參數(shù)資料
型號(hào): FT4232HQ-REEL
廠商: FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù): 14/45頁(yè)
文件大?。?/td> 0K
描述: IC USB HS QUAD UART/SYNC 64-QFN
標(biāo)準(zhǔn)包裝: 1
系列: USBmadeEZ-FIFO
特點(diǎn): USB 至 UART 和(或)SPI、I2C、JTAG
通道數(shù): 4,QUART
FIFO's: 2048 字節(jié)
規(guī)程: RS232,RS422,RS485
電源電壓: 3 V ~ 3.6 V
帶自動(dòng)流量控制功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-QFN 裸露焊盤(9x9)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 634 (CN2011-ZH PDF)
配用: 768-1031-ND - MOD USB HS FT4232H EVAL
其它名稱: 768-1027-6
Copyright 2010 Future Technology Devices International Limited
21
Document No.: FT_000060
FT4232H QUAD HIGH SPEED USB TO MULTIPURPOSE UART/MPSSE IC
Datasheet Version 2.2
Clearance No.: FTDI#78
4.4.1 MPSSE Adaptive Clocking
Adaptive clocking is a new MPSSE feature added to the FT24232H MPSSE engine.
The mode is effectively handshaking the CLK signal with a return clock RTCK. This is a technique used by
ARM processors.
The FT4232H will assert the CLK line and wait for the RTCK to be returned from the target device to
GPIOL3 line before changing the TDO (data out line).
FT4232H
ARM CPU
RTCK
TCK
TDO
GPIOL3
Figure 4.5 Adaptive Clocking Interconnect
TDO
TCK
RTCK
TDO changes on falling
edge of TCK
Figure 4.6: Adaptive Clocking waveform.
Adaptive clocking is not enabled by default.
See: AN_108 Command Processor for MPSSE and MCU Host Bus Emulation Modes.
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