參數(shù)資料
型號(hào): FSTU16245MTD
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 16-Bit Bus Switch with −2V Undershoot Protection
中文描述: CBT/FST/QS/5C/B SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, MO-153ED, TSSOP-48
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 190K
代理商: FSTU16245MTD
2001 Fairchild Semiconductor Corporation
DS500432
www.fairchildsemi.com
April 2001
Revised April 2001
F
2
FSTU16245
16-Bit Bus Switch with
2V Undershoot Protection
General Description
The Fairchild Switch FSTU16245 provides 16-bits of high-
speed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
The device is organized as a 16-bit switch. There are two
8-bit switches with separate output enable inputs. When
OE is LOW, the switch is ON and Port a is connected to
Port B. When OE is HIGH, the switch is OFF and a high
impedance state exists between the A and B Ports. The A
and B Ports are protected against undershoot to support
an extended range to 2.0V below ground. Fairchild’s inte-
grated Undershoot Hardened Circuit (UHC
) senses
undershoot at the I/O and responds by preventing voltage
differentials from developing and turning the switch on.
When OE is HIGH, the switch is OPEN and a high-imped-
ance state exists between the two ports.
Features
I
Undershoot hardened to
2V (A and B Ports)
I
4
switch connection between two ports.
I
Minimal propagation delay through the switch.
I
Low l
CC
.
I
Zero bounce in flow-through mode.
I
Control inputs compatible with TTL level.
I
See Application Note AN-5008 for details
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter
X
to the ordering code.
Connection Diagram
Pin Descriptions
UHC
is a trademark of Fairchild Semiconductor Corporation.
Order Number
FSTU16245MTD
Package Number
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Name
Description
OE
n
Output Enable Input (Active LOW)
Bus A
Bus B
No Internal Connection
1A
n
, 2A
n
, 3A
n
, 4A
n
1B
n
, 2B
n
, 3B
n
, 4B
n
NC
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