參數(shù)資料
型號： FSPLL950SA
元件分類： PLL合成/DDS/VCOs
英文描述： PLL FREQUENCY SYNTHESIZER, 1700 MHz, DSO22
封裝： 197
文件頁數(shù)： 1/1頁
文件大?。?/td> 22K
代理商： FSPLL950SA
[ 42 ]
INTEGRATED FREQUENCY
SYNTHESIZERS
INTEGRATED FREQUENCY
SYNTHESIZERS
201 McLean Boulevard Paterson, New Jersey 07504 Tel: (973) 881-8800 Fax: (973) 881-8361
E-Mail: sales@synergymwave.com World Wide Web: http://www.synergymwave.com
RF Out
Vcc1 Vcc2
Clock In Latch Enable
Data In
F
ref In
Lock Detect
Ground
Package
Input
Output
Style
PIN-OUT TABLE
5
16
18
11
12
9
14
7
All Others
197
COMMON SPECIFICATIONS
Output Impedance: 50 ohms
Reference Input Frequency : 5 to 40 MHz
Operating Temperature:-20oC to +70oC
Reference Input Voltage: >0.5 V p-p
Contact the factory for more stringent operating temperature range
Note:
Ξ
ΞΞ
ΞΞ - Programming Type - Same programming as National Semiconductor LMX2350 fractional chip. **
** Reference frequency must be multiple of (16 x step size)
For package outline drawings, see back pages.
824 - 894
30
+5/+12
50
3
+3
<15
-95/-110
12
15
60
197
FSPLL824SA
Ξ
870 - 960
50
+5/+12
50
3
+3
<15
-95/-110
12
15
60
197
FSPLL870SA
Ξ
900 - 1300
50
+5/+12
50
0
+3
<15
-92/-112
10
15
55
197
FSPLL900SA
Ξ
950 - 1700
100
+5/+24
100
3
+3
<20
-90/-118
12
65
197
FSPLL950SA
Ξ
1470 - 2070 25
+5/+18
60
9
+3
<15
-85/-110
10
15
55
197
FSPLH1470SA
Ξ
1710 - 1880 50
+5/+12
50
3
+3
<15
-92/-110
10
15
60
197
FSPLH1710SA
Ξ
1850 - 1990 50
+5/+12
50
3
+3
<15
-92/-110
10
15
60
197
FSPLH1850SA
Ξ
2040 - 2540 100
+5/+12
50
7
+3
<15
-85/-105
10
15
60
197
FSPLH2040SA
Ξ
FRACTIONAL-N
FREQUENCY
RANGE
(MHz)
OUTPUT
POWER
Tolerance
dBm
(dB)
STEP
SIZE
(KHz)
DCBIAS
REQUIREMENTS
Vcc1 & 2
CURRENT
(Volts)
Max.
(mA)
SETTLING
TIME
(mSec)
TYPICAL
PHASENOISE
dBc/Hz
Offset at
10 KHz/100 KHz
TYPICAL
HARMONIC
SUPPRESSION
2nd
3rd
(dBc)
MODEL
TYPICAL
SPURIOUS
REFERENCE
SIDEBAND
SUPPRESSION
(dBc)
PACKAGE
New!
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