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參數(shù)資料
| 型號： | FSA8008AUMX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONFIG SW/AUD JACK DET 10UMLP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 類型： | 音頻插孔探測器和配置開關(guān) |
| 應(yīng)用： | MP3 播放器，便攜式媒體播放器 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-UFQFN |
| 供應(yīng)商設(shè)備封裝： | 10-UMLP |
| 包裝： | 帶卷 (TR) |
10
Precision Edge
SY89531L
Micrel, Inc.
M9999-010808
hbwhelp@micrel.com or (408) 955-1690
Crystal Input and Oscillator Interface
The SY89531L features a fully integrated on-board
oscillator to minimize system implementation costs. The
oscillator is a series resonant, multivibrator type design,
and thus, a series-resonant crystal is preferred, but not
required.
A parallel-resonant crystal can be used with the SY89531L
with only a minor error in the desired frequency. A parallel-
resonant mode crystal used in a series resonant circuit will
exhibit a frequency of oscillation a few hundred ppm lower
than specified; a few hundred ppm translates to kHz
inaccuracies. In a general computer application this level of
inaccuracy is immaterial.
As the oscillator is somewhat sensitive to loading on its
inputs, the user is advised to mount the crystal as close to
the SY89531L as possible to avoid any board level parasitics.
In addition, trace lengths should be matched. Figure 2 shows
how to interface with a crystal. Table 1 illustrates the crystal
specifications. Certain crystals may require a 10pF capacitor
across XTAL1 and XTAL2 for proper operation. This is
normally not required, but it is recommended that provisions
be made for it.
SY89531L
XTAL2
(Pin 26, SOIC)
XTAL1
(Pin 25, SOIC)
XTAL
16.666MHz
Quartz Crystal Selection:
(1) Raltron Series Resonant: AS-16.666-S-SMD-T-MI
(2) Raltron Parallel Resonant: AS-16.666-18-SMD-T-MI
Optional
Figure 2. Crystal Interface
External Loop Filter Considerations
The SY89531L features an external PLL loop filter that
allows the user to tailor the PLL’s behavior to their application
and operating environment. We recommend using ceramic
capacitors with NPO or X7R dielectric, as they have very-
low effective series resistance. For applications that require
ultra-low cycle-to-cycle jitter, use the components shown in
Figure 3. The PLL loop bandwidth is a function of feedback
divider ratio, and the external loop filter allows the user to
compensate. For instance, the PLL’s loop bandwidth can
be decreased by using a smaller resistor in the loop filter.
This results in less noise from the PLL input, but potentially
more noise from the VCO. Refer to
“AC Electrical
Characteristics” for target PLL loop bandwidth. The designer
should take care to keep the loop filter components on the
same side of the board and as close as possible to the
SY89531L’s LOOP_REF and LOOP_FILTER pins. To insure
minimal noise pick up on the loop filter, it is desirable to cut
away the ground plane directly underneath the loop filter
component pads and traces. However, the benefit may not
be significant in all applications and one must be careful to
not alter the characteristic impedance of nearby traces.
470pF
Loop
Filter
Loop
Reference
330
0.2
F
Figure 3. External Loop Filter Connection
Table 1. Quartz Crystal Oscillator Specifications
Output Frequency: 14MHz-18MHz
Mode of Oscillation: Fundamental
Min
Typ
Max
Unit
Frequency Tolerance @25
°C
—
±30
±50
ppm
Frequency Stability over 0
°C to 70°C
—
±50
±100
ppm
Operating Temperature Range
–20
—
+70
°C
Storage Temperature Range
–55
—
+125
°C
Aging (per yr/first 3 yrs)
——
±5
ppm
Load Capacitance
—
18 (or series)
—
pF
Equivalent Series Resistance (ESR)
——
50
Drive Level
—
100
—
W
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