參數(shù)資料
型號: FSA2567MPX
廠商: Fairchild Semiconductor
文件頁數(shù): 2/12頁
文件大?。?/td> 0K
描述: IC SWITCH 4PDT 16MLP
標(biāo)準(zhǔn)包裝: 1
功能: 開關(guān)
電路: 1 x 4PDT
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.65 V ~ 4.3 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-MLP
供應(yīng)商設(shè)備封裝: 16-MLP
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1219 (CN2011-ZH PDF)
其它名稱: FSA2567MPXDKR
2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSA2567 Rev. 1.0.3
10
FS
A2
567
Low
-Power,
Dua
l
SIM
Ca
rd
Analog
Swit
ch
Physical Dimensions
A. THIS PACKAGE IS NOT CURRENTLY REGISTERED WITH
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994
TOP VIEW
BOTTOM VIEW
RECOMMENDED LAND PATTERN
0.10 C
0.08 C
B
A
C
2.60
1.80
0.10 C
2X
SIDE VIEW
SEATING
PLANE
0.10 C
0.050
0.10 C A B
0.05 C
0.55 MAX.
0.40
PIN #1 IDENT
1
5
9
13
16
ALL TERMINALS
2.100
2.900
0.400
0.663
0.563
0.225
1
15X
16X
0.152
F. DRAWING FILE NAME : UMLP16AREV3
D. TERMINAL SHAPE MAY VARY ACCORDING TO PACKAGE
SUPPLIER, SEE TERMINAL SHAPE VARIANTS
B. DIMENSIONS ARE IN MILLIMETERS.
ANY STANDARDS COMMITTEE
0.40
0.60
0.100
0.30
0.50
0.100
TERMINAL SHAPE VARIANTS
0.15
0.25
15X
PIN 1
NON-PIN 1
0.15
0.25
15X
0.30
0.50
0.15
0.25
0.30
0.50
0.15
0.25
15X
Supplier 1
Supplier 2
PIN 1
NON-PIN 1
E. LAND PATTERN IS A MINIMAL TOE DESIGN
Figure 21.
16-Lead Ultrathin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Packag
e specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packaging/3x3MLP16_Pack_TNR.pdf.
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