AMERICAN MICROSYSTEMS, INC.
May 2000
This document contains information on a preproduction product. Specifications and information herein are subject to change without notice.
ISO9001
5.23.00
FS6330
LAN Hub Clock Generator IC
Preliminary Information
1.0 Features
Develops all the high-speed clocks required for LAN
Hub applications
Clock skew on CLKB1:4 clocks < 250ps
Period jitter: 150ps pk-pk typical
Available in 20-pin SSOP and TSSOP packages
Figure 2: Pin Configuration
X1
VDD
CLKF
SEL1
CLKG
VSS
VDD
X2/REFIN
VSS
SEL0
1
12
2
3
4
5
6
7
8
11
VDD
9
10
CLKB4
VDD
CLKB3
F
VSS
CLKA
CLKB2
CLKB1
VSS
16
15
14
13
20
19
18
17
CLKC
Figure 1: Block Diagram
C
Crystal
Oscillator
FS6330
CLKA
X2/REFIN
X1
PLL
1
PLL
2
PLL
3
CLKB1:4
CLKC
CLKF
CLKG
Table 1: Frequency Table
FONT
CRYSTAL
SEL1
SEL0
CLKA
CLKB[1:4]
CLKC
CLKF
CLKG
0
0
25.000MHz
50.000MHz
66.667MHz
100.000MHz
125.000MHz
0
1
25.000MHz
50.000MHz
75.000MHz
125.000MHz
125.000MHz
1
0
25.000MHz
50.000MHz
83.333MHz
125.000MHz
125.000MHz
FS6330-01
25MHz
1
1
25.000MHz
50.000MHz
100.000MHz
100.000MHz
125.000MHz