參數(shù)資料
型號: FQU10N20L
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: 200V LOGIC N-Channel MOSFET
中文描述: 7.6 A, 200 V, 0.38 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-251
封裝: IPAK-3
文件頁數(shù): 1/9頁
文件大?。?/td> 576K
代理商: FQU10N20L
2000 Fairchild Semiconductor International
December 2000
Rev. A2, December 2000
F
QFET
TM
FQD10N20L / FQU10N20L
200V LOGIC N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state
resistance,
provide
performance, and withstand high energy pulse in the
avalanche and commutation modes. These devices are
well suited for high efficiency switching DC/DC converters,
switch mode power supplies, and motor control.
superior
switching
Features
7.6A, 200V, R
DS(on)
= 0.36
@V
GS
= 10 V
Low gate charge ( typical 13 nC)
Low Crss ( typical 14 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Low level gate drive requirement allowing direct
operation from logic drivers
Absolute Maximum Ratings
T
C
= 25°C unless otherwise noted
Thermal Characteristics
Symbol
V
DSS
I
D
Parameter
FQD10N20L / FQU10N20L
200
7.6
4.8
30.4
±
20
180
7.6
5.1
5.5
2.5
51
0.4
-55 to +150
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
Drain-Source Voltage
Drain Current
- Continuous (T
C
= 25°C)
- Continuous (T
C
= 100°C)
- Pulsed
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
Drain Current
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25°C) *
Power Dissipation (T
C
= 25°C)
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
- Derate above 25°C
T
J
, T
STG
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8
from case for 5 seconds
T
L
300
°C
Symbol
R
θ
JC
R
θ
JA
R
θ
JA
Parameter
Typ
--
--
--
Max
2.48
50
110
Units
°C
/
W
°C
/
W
°C
/
W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
! "
!
!
S
!
"
"
D
G
I-PAK
FQU Series
D-PAK
FQD Series
G
S
D
G
S
D
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