參數(shù)資料
型號: FQD3N50C
廠商: Fairchild Semiconductor Corporation
英文描述: 500V N-Channel MOSFET
中文描述: 500V N溝道MOSFET
文件頁數(shù): 1/9頁
文件大小: 1043K
代理商: FQD3N50C
2005 Fairchild Semiconductor Corporation
FQD3N50C/FQU3N50C Rev. A
1
www.fairchildsemi.com
F
QFET
FQD3N50C/FQU3N50C
500V N-Channel MOSFET
Features
2.5 A, 500 V, R
DS(on)
= 2.5
@ V
GS
= 10 V
Low gate charge ( typical 10 nC )
Low Crss ( typical 8.5 pF)
Fast switching
100 % avalanche tested
Improved dv/dt capability
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
ciency switched mode power supplies, active power factor cor-
rection, electronic lamp ballasts based on half bridge topology.
Absolute Maximum Ratings
Thermal Characteristics
* When mounted on the minimum pad size recommended (PCB Mount)
{
{
S
{
{
{
{
D
G
I-PAK
FQU Series
D-PAK
FQD Series
G
S
D
G
S
D
Symbol
Parameter
FQD3N50C/FQU3N50C
Units
V
DSS
I
D
Drain-Source Voltage
500
V
Drain Current
- Continuous (T
C
= 25°C)
- Continuous (T
C
= 100°C)
- Pulsed
2.5
A
1.5
A
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
Drain Current
(Note 1)
10
A
Gate-Source Voltage
±
30
V
Single Pulsed Avalanche Energy
(Note 2)
200
mJ
Avalanche Current
(Note 1)
2.5
A
Repetitive Avalanche Energy
(Note 1)
3.5
mJ
Peak Diode Recovery dv/dt
(Note 3)
4.5
V/ns
P
D
Power Dissipation (T
C
= 25°C)
35
W
- Derate above 25°C
0.28
W/°C
T
J
, T
STG
T
L
Operating and Storage Temperature Range
-55 to +150
°C
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
°C
Symbol
Parameter
Typ
Max
Units
R
θ
JC
R
θ
JA
R
θ
JA
Thermal Resistance, Junction-to-Case
--
3.5
°C
/
W
Thermal Resistance, Junction-to-Ambient*
--
50
°C
/
W
Thermal Resistance, Junction-to-Ambient
--
110
°C
/
W
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