參數(shù)資料
型號： FPDA200V
英文描述： HIGH PERFORMANCE PHEMT WITH SOURCE VIAS
中文描述： 高，性能PHEMT的源孔
文件頁數(shù)： 1/3頁
文件大小： 57K
代理商： FPDA200V
Preliminary Data Sheet
FPDA200V
H
IGH
P
ERFORMANCE
PHEMT
WITH
S
OURCE
V
IAS
Phone:
(408) 988-1845
Fax:
(408) 970-9950
http://
www.filss.com
Revised:
2/25/02
Email:
sales@filss.com
FEATURES
21 dBm Output Power at 1-dB
Compression at 18 GHz
12.5 dB Power Gain at 18 GHz
55% Power-Added Efficiency
Source Vias to Backside Metallization
DESCRIPTION AND APPLICATIONS
The FPDA200V is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25
μ
m by 200
μ
m Schottky barrier gate. The recessed “mushroom” gate structure minimizes
parasitic gate-source and gate resistances. The epitaxial structure and processing have been
optimized for high dynamic range.
Typical applications include high dynamic range driver stages for commercial applications including
wireless infrastructure systems, broad bandwidth amplifiers, and optical systems.
Source vias have been added for improved performance and assembly convenience. Each via hole
has 0.02 nH of inductance. Additionally, the via holes remove the need for source bond wires,
meaning only two bond wires are required for assembly. Because the via connects the source pad to
the backside metallization, self-bias configurations should be designed with caution.
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25
°
C
Parameter
Symbol
I
DSS
P-1dB
G-1dB
PAE
I
MAX
G
M
I
GSO
V
P
|V
BDGS
|
Test Conditions
V
DS
= 2 V; V
GS
= 0 V
V
DS
= 5 V; I
DS
= 50% I
DSS
V
DS
= 5 V; I
DS
= 50% I
DSS
V
DS
= 5 V; I
DS
= 50% I
DSS
V
DS
= 2 V; V
GS
= 1 V
V
DS
= 2 V; V
GS
= 0 V
V
GS
= -5 V
V
DS
= 2 V; I
DS
= 1 mA
I
GS
= 1 mA
Min
40
19
11
Typ
60
21
12.5
55
125
70
1
Max
85
Units
mA
dBm
dB
%
mA
mS
μ
A
V
V
Saturated Drain-Source Current
Power at 1-dB Compression
Power Gain at 1-dB Compression
Power-Added Efficiency
Maximum Drain-Source Current
Transconductance
Gate-Source Leakage Current
50
10
Pinch-Off Voltage
Gate-Source Breakdown
Voltage Magnitude
Gate-Drain Breakdown
Voltage Magnitude
Thermal Resistivity
frequency=18 GHz
-0.25
6
-0.8
7
-1.5
|V
BDGD
|
I
GD
= 1 mA
8
9
V
Θ
JC
260
°
C/W
DRAIN
BOND
PAD
DIE SIZE: 15.6X13.2 mils (395x335
μ
m)
DIE THICKNESS: 3.9 mils (100
μ
m)
BONDING PADS: 3.1X3.1 mils (80x80
μ
m)
GATE
BOND
PAD
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