參數(shù)資料
型號: FPD87352CXA
廠商: National Semiconductor Corporation
英文描述: +3.3V TFT-LCD Timing Controller with Single LVDS Input/Dual RSDS Outputs Including RTC for TFT-LCD Monitors and TV
中文描述: 3.3 TFT - LCD的單LVDS輸入定時控制器/雙RSDS輸出時鐘在內(nèi)的TFT - LCD監(jiān)視器和電視
文件頁數(shù): 3/5頁
文件大?。?/td> 132K
代理商: FPD87352CXA
Block Diagram
Function Description
FPD-LINK RECEIVER
The LVDS based FPD-Link Receiver receives input video
data and control timing. Four LVDS channels plus clock
provide 24-bit color.
RESETN initializes the chip with the default register values
for the LUT values from internal ROM or external EEPROM.
SSC (SPREAD SPECTRUM CONTROL)
This SSC function provides a means for reducing EMI. This
feature uses external SSC signal source that provides syn-
chronized spread spectrum for RSDS and control signal
outputs.
2-WIRE SERIAL EEPROM INTERFACE
The Serial EEPROM Interface controls the FPD87352CXA
initialization of LUT register. If the EEPROM is not present,
the
LUT
value
is
provided
FPD87352CXA.
by
internal
ROM
of
CLK & DATA SYNCHRONIZER
This function delays and aligns data to match the internal
data process which included RSDS skew control by
RSKEW[2:0]. All the data processes are needed to be
aligned each data path through RSDS output and LCD tim-
ing control signal.
LUT REGISTER
This block provides the RTC reference values to be pro-
cessed on the RTC Data Processor Block. The setting of
RTC reference values is provided by the external EEPROM
in normal condition. If the external EEPROM is not present it
will use the internal ROM’s RTC reference values. The RTC
reference values are the new gray values depending on the
difference between the current frames’ RGB gray data and
the previous frame’s RGB gray data of same pixel.
RTC DATA PROCESSOR
This function generates new gray values depending on the
difference of the current RGB gray data and same pixel of
the previous frame. The reference values fetch from the LUT
(Look Up Table) values in the LUT Register.
RSDS INTERFACE WITH SKEW CONTROL
This functional block transforms CMOS level signal to RSDS
for the system clock (DCLK) and RGB color data. The RSDS
skew is controlled by RSKEW[2:0] with delay steps between
the RSF/BCKP/N and RSF/BR/G/B[3:0]P/N which is imple-
mented in CLK & Data synchronizer.
20116202
FIGURE 2. Block Diagram
F
www.national.com
3
相關(guān)PDF資料
PDF描述
FPD87370AXA Low EMI Low Dynamic Power VGA/XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling RSDS Outputs
FPD87370AXAVS Low EMI Low Dynamic Power VGA/XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling RSDS Outputs
FPD87392BXBVQ +3.3V TFT-LCD Timing Controller with Dual LVDS Inputs/Dual RSDS⑩ Outputs for TFT-LCD Monitor and Notebook (SXGA/SXGA+/UXGA)
FPD87392 +3.3V TFT-LCD Timing Controller with Dual LVDS Inputs/Dual RSDS⑩ Outputs for TFT-LCD Monitor and Notebook (SXGA/SXGA+/UXGA)
FPD87392BXB +3.3V TFT-LCD Timing Controller with Dual LVDS Inputs/Dual RSDS⑩ Outputs for TFT-LCD Monitor and Notebook (SXGA/SXGA+/UXGA)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FPD87352CXAVV 制造商:Texas Instruments 功能描述:LVDS TIMING CONTROLLER SMD 87352
FPD87352CXAVV/NOPB 功能描述:IC TIMING CTLR TFT-LCD 176-LQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
FPD87370 制造商:TI 制造商全稱:Texas Instruments 功能描述:FPD87370AXA Low EMI, Low Dynamic Power VGA/XGA/WXGA TFT-LCD Timing Controllerwith Reduced Swing Differential Signaling (RSDS) Outputs
FPD87370A WAF 制造商:Texas Instruments 功能描述:
FPD87370AXA 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low EMI Low Dynamic Power VGA/XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling RSDS Outputs