- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375872 > FPD33684B (National Semiconductor Corporation) Low Power, Low EMI, TFT-LCD Column Driver with RSDS⑩ Inputs, 64 Grayshades, and 384 Outputs for XGA/SXGA Applications PDF資料下載
參數(shù)資料
| 型號： | FPD33684B |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low Power, Low EMI, TFT-LCD Column Driver with RSDS⑩ Inputs, 64 Grayshades, and 384 Outputs for XGA/SXGA Applications |
| 中文描述： | 低功耗，低EMI，TFT - LCD的柱與⑩輸入?yún)^(qū)特別職務(wù)隊，64 Grayshades，和384的XGA輸出驅(qū)動器/ SXGA應(yīng)用 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 233K |
| 代理商： | FPD33684B |
RSDS Characteristics
(Continued)
Analog Electrical Characteristics
Symbol
I
DD2
I
HBIAS
Parameter
Conditions
Min
Typ
3.0
Max
8.0
Units
mA
Supply Current Consumption
Current Consumption through
HBIAS pin
Power Dissipation
Upper RDAC High Side Input
(Note 7)
1.25
mA
PD
V
GMA1
(Note 7)
(Note 8)
45
mW
V
DD2
/2
+ 0.2
V
DD2
/2
+ 0.2
V
DD2
0.2
V
DD2
0.2
V
DD2
/2
0.2
V
DD2
/2
0.2
V
V
GMA5
Upper RDAC Low Side Input
(Note 8)
V
V
GMA6
Lower RDAC High Side Input
(Note 8)
0.2
V
V
GMA10
Lower RDAC Low Side Input
(Note 8)
0.2
V
V
CS
Charge Share Voltage
The
Greater
of V
DD1
or
V
GMA6
30
V
SS2
+
0.2
V
GMA5
V
C
LOAD
V
OUT
Output Capacitive Load
Output Voltage Range
150
V
DD2
0.2
pF
V
R
DAC
RDAC References (V
GMA1
to
V
GMA5
and V
GMA6
to V
GMA10
)
Output Peak to Peak Error (gray
levels 0 through 58)
Output Peak to Peak Error (gray
levels 59 through 63)
Output Part to Part Error
Repair Buffer Output Current
each
12.0
15.0
18.0
k
V
pperr
V
GMA1
= V
DD2
0.2V
V
GMA10
= V
SS2
+ 0.2V
(Note 9)
±
3
±
12
mV
±
5
±
25
mV
V
parterr
I
OUT RP
(Note 10)
(Note 11)
±
5
mV
mA
±
2
±
3
Note 7:
V
= 10.5V, V
HBIAS
= 10.5V, V
= 3.3V, DCLK = 65 MHz, R
LOAD
= 5 k
, C
LOAD
= 50 pF, charge share time = 1.5 μs, all other swinging between
V
GMA1
(= 8.0V) and V
GMA10
(= 0.5V) with a line time = 22 μs.
Note 8:
The following relationship must be maintained between the reference voltages: V
DD2
>
V
GMA1
>
V
GMA2
>
V
GMA3
>
V
GMA4
>
V
GMA5
>
V
GMA6
>
V
GMA7
>
V
GMA8
>
V
GMA9
>
V
GMA10
>
V
SS2
Note 9:
V
pperr
is defined as the error in peak-to-peak output voltage for each gray level when the output swings from the gray level high value (VHxx) to the gray
level low value (VLxx). This parameter applies to every output on the die. The typical value represents one standard deviation from ideal based on final test data.
Note 10:
V
parterr
is meant to guarantee the part to part output variation. The average of all outputs at gray level 32 is compared to a nominal gray level 32 value.
Note 11:
Current into device pins is defined as positive. Current out of device pins is defined as negative. |V
OUT
V
IN
|
>
500mV.
DS200113-2
FIGURE 1. RSDS
Signal Definition
F
www.national.com
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FPD48084 | LCD TV TFT-LCD Timing Controller with PPDS |
| FPD5W1KX | Avalanche Photodiode |
| FPD63310 | UNIVERSAL INTERFACE XGA PANEL TIMING CONTROLLER REDUCED SWING DIFFERENTIAL SIGNALING |
| FPD80200 | LCD TV TFT-LCD Timing Controller with PPDS⑩ Interface |
| FPD85308 | Panel Timing Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FPD4000AF | 制造商:FILTRONIC 制造商全稱:FILTRONIC 功能描述:4W PACKAGED POWER PHEMT |
| FPD4000AS | 制造商:FILTRONIC 制造商全稱:FILTRONIC 功能描述:2.5W PACKAGED POWER PHEMT |
| FPD4000V | 制造商:FILTRONIC 制造商全稱:FILTRONIC 功能描述:4W POWER PHEMT |
| FPD413 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| FPD470 | 制造商:Honeywell Sensing and Control 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。