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參數(shù)資料
| 型號： | FOD063L |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 光電耦合器 |
| 英文描述： | LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers |
| 中文描述： | 2 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 10 Mbps |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 639K |
| 代理商： | FOD063L |
4
www.fairchildsemi.com
FOD060L, FOD260L, FOD063L Rev. 1.0.0
F
Transfer Characteristics
(T
A
= -40°C to +85°C Unless otherwise specified.)
Isolation Characteristics
(T
A
= -40°C to +85°C Unless otherwise specified.)
Characteristics
Test Conditions
** All typical values are at V
CC
= 3.3 V, T
A
= 25°C
Notes
1.
The V
supply to each optoisolator must be bypassed by a 0.1μF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V
CC
and
GND pins of each device.
2.
Enable Input – No pull up resistor required as the device has an internal pull up resistor.
3.
t
– Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the
1.5V level on the LOW to HIGH transition of the output voltage pulse.
4.
t
– Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V
level on the HIGH to LOW transition of the output voltage pulse.
5.
t
PSK
is the worst case difference between t
PHL
and t
PLH
for any devices at the stated test conditions.
6. t
r
– Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7.
t
f
– Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8.
t
– Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse
to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
9.
t
– Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse
to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
10. CM
H
– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e.,
V
OUT
> 2.0 V). Measured in volts per microsecond (V/μs).
11. CM
– The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state
(i.e., V
OUT
< 0.8 V). Measured in volts per microsecond (V/μs).
12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
DC Characteristics
Test Conditions Symbol
Min
Typ**
Max
Unit
High Level Output Current
(I
F
= 250 μA, V
CC
= 3.3 V, V
O
= 3.3 V)
(Note 2) V
E
= 2.0 V
(V
CC
= 3.3 V, I
F
= 5 mA, I
OL
= 13 mA)
(Note 2) V
E
= 2.0 V
(V
CC
= 3.3 V, V
O
= 0.6 V, I
OL
= 13 mA)
(Note 2) V
E
= 2.0 V
I
OH
50
μA
Single Channel
Low Level Output Voltage
V
OL
0.6
V
Single Channel
Input Threshold Current
I
FT
5
mA
Single Channel
Device
Symbol
Min
Typ**
Max
Unit
Input-Output
Insulation Leakage Current
(Relative humidity = 45%)
(T
A
= 25°C, t = 5 s)
(V
I-O
= 3000 VDC)
(Note 12)
I
I-O
1.0*
μA
Withstand Insulation Test
Voltage
I
IO
≤
10 μA, R
H
< 50%,
T
A
= 25°C)
(Note 12) ( t = 1 min.)
FOD060L
FOD063L
V
ISO
2500
V
RMS
FOD260L
5000
Resistance (Input to Output)
(V
I-O
= 500 V) (Note 12)
(f = 1 MHz) (Note 12)
R
I-O
C
I-O
10
12
Capacitance (Input to Output)
0.6
pF
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