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R O D U C T
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R I E F
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Infineon Technologies AG 2002. All Rights Reserved.
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The information herein is given to describe certain components
and shall not be considered as warranted characteristics.
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limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
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Information
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FOA4400 MUX Block Diagram
Register
16:1
MUX
CMU
&
PD
VCO
Data IN
16 x 2.5 Gbit/s
Data OUT
39.8-43 Gbit/s
Clock IN
2.5 GHz
Clock OUT
2.5 GHz
Clock OUT
622 MHz
Clock OUT
20 GHz
Clock OUT
40 GHz
VCO
CTRL
Extern
VCO
PD
OUT
Reference Clock
622 MHz / 2.5 GHz
MUX FOA4400
FOA9400
1:1
FIFO
(optional)
1
I
40 Gbit/s
40 Gbit/s
1
O
FOA5400
2:16
DEMUX
FOA5401
CDR &
1:2
DEMUX
FOA4400
16:1
MUX
E
O
E
O
40 Gbit/s Chipset Overview
Ordering No. B168-H7899-G1-X-7600
Printed in Germany
PS 1201.5
NB
PREAMP
VCO
Data OUT
2 x 20 Gbit/s
Data IN
39.8-43 Gbit/s
VCO
CTRL
Extern
VCO
PD
OUT
CDR FOA5401
1:2
DEMUX
CDR
Phase Adjust
Clock OUT
20 GHz
Threshold
Adjust
FOA5400 DEMUX Block Diagram
FOA5401 CDR Block Diagram
Data OUT
16 x 2.5 Gbit/s
Data IN
2 x 20 Gbit/s
DEMUX FOA5400
2:16
DEMUX
CLK
Management
CLK IN
20 GHz
CLK OUT
2.5 GHz
CLK OUT
1.25 GHz
19 MHz
FOA9400 FIFO Block Diagram
Data OUT
16 x 2.5 Gbit/s
Data IN
16 x 2.5 Gbit/s
FIFO FOA9400
CLK
Management
16:16 FIFO
CLK IN
1.25 GHz
CLK OUT
2.5 GHz
CLK OUT
1.25 GHz
Packing
Type
MUX 16:1
FIFO 1:1
DEMUX 2:16
CDR 1:2
Sales Code
FOA4400
FOA9400
FOA5400
FOA5401
Package
Bare Die
Bare Die
Bare Die
Bare Die