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參數(shù)資料
| 型號： | FN6094 |
| 廠商： | Intersil Corporation |
| 英文描述： | Ultra Low ON-Resistance, Low Voltage, Single Supply, Quad SPDT (Dual DPDT) Analog Switch |
| 中文描述： | 超低導(dǎo)通電阻，低電壓，單電源，四路單刀雙擲（雙DPDT）模擬開關(guān) |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 412K |
| 代理商： | FN6094 |
8
FN6094.3
November 5, 2004
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
Typical Performance Curves
T
A
= 25°C, Unless Otherwise Specified
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
R
O
)
V
COM
(V)
0
1
2
3
4
I
COM
= 100mA
0.2
0.25
0.3
0.35
0.4
0.45
V+ = 3V
V+ = 2.7V
V+ = 1.8V
V+ = 3.6V
R
O
)
V
COM
(V)
0
0.5
1
1.5
2
2.5
3
V+ = 2.7V
I
COM
= 100mA
0.15
0.2
0.25
0.3
0.35
25°C
85°C
-40°C
0
0.5
1
1.5
2
R
O
)
V
COM
(V)
0.2
0.25
0.3
0.35
0.4
0.45
0.5
85°C
-40°C
V+ = 1.8V
I
COM
= 100mA
25°C
0
0.5
1
1.5
2
2.5
3
Q
V
COM
(V)
-150
-100
-50
0
50
V+ = 1.8V
V+ = 3V
ISL83699
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