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參數(shù)資料
| 型號： | FMS6407MTF20 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 消費家電 |
| 英文描述： | Triple Video Drivers with Selectable HD/Progressive/SD/Bypass Filters |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO20 |
| 封裝： | LEAD FREE, TSSOP-20 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 378K |
| 代理商： | FMS6407MTF20 |
REV. 1I July 2005
11
FMS6407
DATA SHEET
and an external sync signal must be input on the SYNC_IN
pin.
Refer to the External Sync section for more details.
The
timing required for this operating mode is shown in Figure 2.
Figure 2. Bi-Level External
Sync Clamping and Bias
HD Video Sync Processing
When the input signal is a high definition signal, the tri-level
sync pulse is too short to allow proper clamp operation.
Rather than clamp during the sync pulse, the sync pulse is
located and the signal is clamped to the blanking level. This
is done in such a way that the sync tip will still be set to
approximately 250mV. The EXT_SYNC control input
selects the sync stripper output or the SYNC_IN pin for use
by the clamp circuit. This means that the SYNC_IN timing
for HD signals is different than the timing for SD or PS sig-
nals. For HD signals, the SYNC_IN signal must be high
when the clamp must be active. This is during the time
immediately after the sync pulse while the signal is at the
blanking level. This operation is shown in Figure 3. Note that
the following diagrams indicate output voltage levels for
both 0dB and 6dB gain (1V
pp
and 2V
pp
video signals at the
FMS6407 output pin).
Figure 3. Tri-Level Blanking Clamp
NOTE:
Tri-level sync may only be compressed 5%. If
tri-level sync is compressed more than 5% it may not be
properly located.
Sync Timing
Normally, the FMS6407 will respond to bi-level sync and
clamp the sync tip during period ‘B’ in Figure 4(a). When
the filters are switched to high definition mode (30MHz) the
sync processing will respond to tri-level sync and clamp to
the blanking level during period ‘C’ in Figure 4(b).
Figure 4. Sync Timing; Bi-Level (a), Tri-Level (b)
The tri-level sync pulse is located such that the broad pulses
in the vertical interval do not trigger the clamp. In order to
improve the system settling at turn-on, the broad pulses will
be clamped to just above ground. Once the broad pulses (and
tri-level sync tips) are above ground, the normal clamping
process takes over and clamps to the blanking level during
period ‘C’ in Figure 4(b).
The FMS6407 is designed to support the video standards
and associated sync timings shown in Table I on page 12
(additional standards such as 483p59.94 will also work
correctly). The filter settings table from page 9 is repeated on
page 12 for convenience.
A
B
C
B
250mV
850mV
2250mV
1450mV
A
B
C
250mV
850mV
2250mV
480i and 480p
720p and 1080i
(a)
(b)
250mV 250mV
550mV 850mV
1250mV 2250mV
850mV 1450mV
0mV 0mV
Required Sync Tip
Offset (Next Sync Tip
Will Be Offset Correctly)
Active
Video
A
v
*300mV
A
v
*700mV
A
v
*300mV
True Sync Position
Allowable SYNC_IN
T1
T2
0H
0dB Gain 6dB
A
v
= 1 (0dB) or 2 (6dB)
250mV 250mV
950mV 1650mV
0mV 0mV
Required Blanking Offset
A
v
*700mV
True Sync Position
Allowable SYNC_IN
Active
Video
T1
T2
A
v
= 1 (0dB) or 2 (6dB)
0dB Gain 6dB
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FMS6407MTF20X | 功能描述:視頻 IC TrplVidDrvr w/select HD/Prog/SD/BypssFltr RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| FMS6408 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Triple Video Filter Driver for RGB and YUV Signals |
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| FMS6408-1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Triple Video Filter Driver for RGB and YUV Signals |
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