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參數資料
| 型號： | FM93CS46V |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | DRAM |
| 英文描述： | (MICROWIRE⑩ Bus Interface) 1024-Bit Serial EEPROM with Data Protect and Sequential Read |
| 中文描述： | （MICROWIRE的⑩總線接口），1024位串行EEPROM的數據保護和連續(xù)讀 |
| 文件頁數： | 12/16頁 |
| 文件大小： | 172K |
| 代理商： | FM93CS46V |
12
www.fairchildsemi.com
FM93CS46 Rev. C.1
F
w
Timing Diagrams
(Continued)
Address
Bits(6)
CS
PE
SK
DI
DO
93CS46:
Address bits pattern -> User defined
High - Z
t
CS
PROTECT REGISTER WRITE CYCLE (PRWRITE)
Start
Bit
Opcode
Bits(2)
1
0
1
A5
A4
A1
A0
PRE
Busy
Ready
t
WP
Address
Bits(6)
CS
PE
SK
DI
DO
High - Z
t
CS
PROTECT REGISTER DISABLE CYCLE (PRDS)
Start
Bit
93CS46:
Address bits pattern -> 0-0-0-0-0-0
Opcode
Bits(2)
1
0
0
A5
A4
A1
A0
PRE
Busy
Ready
t
WP
Address
Bits(6)
CS
PE
SK
DI
DO
93CS46:
Address bits pattern -> 1-1-1-1-1-1
High - Z
t
CS
PROTECT REGISTER CLEAR CYCLE (PRCLEAR)
Start
Bit
Opcode
Bits(2)
1
1
1
A5
A4
A1
A0
PRE
Busy
Ready
t
WP
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