參數(shù)資料
型號(hào)： FM3808-70-T
廠商： Electronic Theatre Controls, Inc.
元件分類： DRAM
英文描述： 4Kb FRAM Serial 3V Memory
中文描述： 4Kb的鐵電串行3V的記憶
文件頁(yè)數(shù)： 14/28頁(yè)
文件大?。?/td> 191K
代理商： FM3808-70-T
FM3808
Rev 1.1
May 2003
Page 14 of 28
WIE is set to 0, the watchdog timer affects only the
internal flag.
Alarm Interrupt Enable – AIE. When set to 1, the
alarm match drives the INT pin as well as an internal
flag. When set to 0, the alarm match only affects the
internal flag.
Power-fail Interrupt Enable - PFE. When set to 1, the
power-fail monitor drives the pin as well as an
internal flag. When set to 0, the power-fail monitor
affects only the internal flag.
Alarm Battery-backup Enable - ABE. When set to 1,
the clock alarm interrupt (as controlled by AIE) will
function even in battery backup mode. When set to 0,
the alarm will occur only when V
DD
> V
LO
. AIE
should only be set when the INT pin is programmed
for active low operation. In addition, it only functions
with the clock alarm, not the watchdog. If enabled,
the power monitor will drive the interrupt during all
normal V
DD
conditions regardless of the ABE bit. The
application for ABE is intended for power control,
where a system powers up at a predetermined time.
Depending on the application, it may require
dedicating the INT pin to this function.
High/Low – H/L. When set to a 1, the INT pin is
active high and the driver mode is push-pull. The INT
pin can drive high only when V
DD
>V
LO
. When set to a
0, the INT pin is active low and the driver mode is
open-drain. Active low (open drain) is operational
even in battery backup mode.
Pulse/Level – P/L. When set to a 1 and an interrupt
occurs, the INT pin is driven for approximately 200
ms. When P/L is set to a 0, the INT pin is driven high
or low (determined by H/L) until the Flags/Control
register is read.
When an enabled interrupt source activates the INT
pin, an external host can read the Flags/Control
register to determine the cause. Remember that all
flags will be cleared when the register is read. If the
INT pin is programmed for Level mode, then the
condition will clear and the INT pin will return to its
inactive state. If the pin is programmed for Pulse
mode, then reading the flag also will clear the flag
and the pin. The pulse will not complete its specified
duration if the Flags/Control register is read. If the
INT pin is used as a host reset, then the Flags/Control
register cannot be read during a reset. Care should be
taken in reading the flags as a new source may occur
after the pin goes active but before the register is
read.
During a power-on reset with no battery, the
interrupt register is automatically loaded with the
value 24h. This causes power-fail interrupt to be
enabled with an active-low pulse.
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