參數(shù)資料
型號: FM3316-GTR
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO14
封裝: GREEN, MO-012AB, SOIC-14
文件頁數(shù): 15/28頁
文件大?。?/td> 320K
代理商: FM3316-GTR
FM33256/FM3316 SPI Companion w/ FRAM
Rev. 2.0
Feb. 2009
Page 22 of 28
After the op-code and address are issued, the device
drives out the read data on the next 8 clocks. The SI
input is ignored during read data bytes. Subsequent
bytes are data bytes, which are read out sequentially.
Addresses are incremented internally as long as the
bus master continues to issue clocks and /CS is low.
If the last address is reached (e.g. 7FFFh on the
FM33256), the counter will roll over to 0000h. Data
is read MSB first. The rising edge of /CS terminates a
READ operation.
A read operation is shown in
Figure 20.
CS
SCK
SI
SO
0
1
234
56
7
00
Hi-Z
1
MSB
LSB
012
34
6
7
X
0
Op-code
16-bit Address
0
1
11
12
13
14
01
23
45
67
7
Data In
0
1
2
3
4
5
6
MSB
LSB
7
0
00
0
Figure 19. Memory Write
CS
SCK
SI
SO
0
1
234
56
7
00
Hi-Z
1
MSB
LSB
012
34
6
7
X
0
Op-code
16-bit Address
0
1
11
12
13
14
01
23
45
67
7
Data Out
0
1
2
3
4
5
6
MSB
LSB
7
0
1
00
0
Figure 20. Memory Read
Addressing F-RAM Array in the FM33xx Family
The FM33xx devices include 256Kb and 16Kb memory densities. The following 2-byte address field is shown for
each density.
Table 7. Two-Byte Memory Address
Part #
1
st Address Byte
2
nd Address Byte
FM33256
x
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
FM3316
x
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
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