- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375848 > FM27C010N120 (FAIRCHILD SEMICONDUCTOR CORP) CONN HEADER .100 72POS DL GOLD PDF資料下載
參數(shù)資料
| 型號： | FM27C010N120 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | CONN HEADER .100 72POS DL GOLD |
| 中文描述： | 128K X 8 OTPROM, 120 ns, PDIP32 |
| 封裝： | PLASTIC, DIP-32 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 109K |
| 代理商： | FM27C010N120 |
4
www.fairchildsemi.com
F
FM27C010
AC Test Conditions
Output Load
1 TTL Gate and C
L
= 100 pF (Note 8)
Input Rise and Fall Times
≤
5 ns
Input Pulse Levels
0.45V to 2.4V
Timing Measurement Reference Level
Inputs
Outputs
0.8V and 2V
0.8V and 2V
AC Waveforms
(Note 6), (Note 7), and (Note 9)
Note 1:
Stresses above those listed under
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note 2:
This parameter is only sampled and is not 100% tested.
Note 3:
OE may be delayed up to t
ACC
- t
OE
after the falling edge of CE without impacting t
ACC
.
Note 4:
The t
and t
compare level is determined as follows:
High to TRI-STATE
, the measured V
OH1
(DC) - 0.10V;
Low to TRI-STATE, the measured V
OL1
(DC) + 0.10V.
Note 5:
TRI-STATE may be attained using OE or CE.
Note 6:
The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1
μ
F ceramic capacitor be used on every device
between V
CC
and GND.
Note 7:
The outputs must be restricted to V
CC
+ 1.0V to avoid latch-up and device damage.
Note 8:
1 TTL Gate: I
= 1.6 mA, I
= -400
μ
A.
C
L
: 100 pF includes fixture capacitance.
Note 9:
V
PP
may be connected to V
CC
except during programming.
Note 10:
Inputs and outputs can undershoot to -2.0V for 20 ns Max.
Programming Characteristics
(Note 11), (Note 12), (Note 13), and (Note 14)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
1
μ
s
t
OES
OE Setup Time
1
μ
s
t
CES
CE Setup Time
OE = V
IH
1
μ
s
t
DS
Data Setup Time
1
μ
s
t
VPS
V
PP
Setup Time
1
μ
s
t
VCS
V
CC
Setup Time
1
μ
s
t
AH
Address Hold Time
0
μ
s
t
DH
Data Hold Time
1
μ
s
t
DF
Output Enable to Output Float Delay
CE = V
IL
0
60
ns
t
PW
Program Pulse Width
45
50
105
μ
s
Address Valid
Valid Output
Hi-Z
2V
2V
0.8V
2V
0.8V
ADDRESS
OUTPUT
CE
OE
t
CE
2V
0.8V
(Note 3)
(Note 3)
t
DF
(Note 4, 5)
(Note 4, 5)
t
OH
Hi-Z
t
OE
t
ACC
t
CF
DS800032-4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FM27C010N150 | CONN HEADER .100 72POS DUAL TIN |
| FM27C010NE120 | SOCKET TERMINAL, STRIP, 36-POS 2-ROW, 0.135 |
| FM27C010NE150 | CONN HEADER .100 72POS DL GOLD |
| FM27C010NE90 | CONN HEADER .100 72POS DUAL TIN |
| FM27C010Q | CONN HEADER .100 40POS SGL GOLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM27C010N150 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1,048,576-Bit 128K x 8 High Performance CMOS EPROM |
| FM27C010N45L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| FM27C010N55L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| FM27C010N90 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1,048,576-Bit 128K x 8 High Performance CMOS EPROM |
| FM27C010NE120 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1,048,576-Bit 128K x 8 High Performance CMOS EPROM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。