參數(shù)資料
型號: FM25L04-S
廠商: Electronic Theatre Controls, Inc.
元件分類: DRAM
英文描述: 4Kb FRAM Serial 3V Memory
中文描述: 4Kb的鐵電串行3V的記憶
文件頁數(shù): 9/12頁
文件大小: 187K
代理商: FM25L04-S
FM25L04
AC Parameters
(T
A
= -40
°
C to + 85
°
C, C
L
= 30pF, unless otherwise specified)
Symbol
Parameter
f
CK
SCK Clock Frequency
t
CH
Clock High Time
t
CL
Clock Low Time
t
CSU
Chip Select Setup
t
CSH
Chip Select Hold
t
OD
Output Disable Time
t
ODV
Output Data Valid Time
t
OH
Output Hold Time
t
D
Deselect Time
t
R
Data In Rise Time
t
F
Data In Fall Time
t
SU
Data Setup Time
t
H
Data Hold Time
t
HS
/Hold Setup Time
t
HH
/Hold Hold Time
t
HZ
/Hold Low to Hi-Z
t
LZ
/Hold High to Data Active
Notes
1.
t
CH
+ t
CL
= 1/f
CK
.
2.
For Clock High Time t
CH
35 ns, the parameter t
ODV
is extended such that t
CH
+ t
ODV
65 ns.
3.
This parameter is characterized but not 100% tested.
4.
Rise and fall times measured between 10% and 90% of waveform.
Power Cycle Timing
(T
A
= -40
°
C to + 85
°
C, V
DD
= 2.7V to 3.6V)
Symbol
Parameter
t
PU
Power Up (V
DD
min) to First Access (/CS low)
t
PD
Last Access (/CS high) to Power Down (V
DD
min)
t
VR
V
DD
Rise Time
t
VF
V
DD
Fall Time
Capacitance
(T
A
= 25
°
C, f=1.0 MHz, V
DD
= 3.3V)
Symbol
Parameter
C
O
Output Capacitance (SO)
C
I
Input Capacitance
Notes
1.
This parameter is characterized but not 100% tested.
2.
Slope measured at any point on V
DD
waveform.
AC Test Conditions
Input Pulse Levels
10% and 90% of V
DD
Input rise and fall times
5 ns
Input and output timing levels
0.5 V
DD
Output Load Capacitance
30 pF
Rev. 2.0
May 2005
Page 9 of 12
V
DD
2.7 to 3.0V
Min
0
40
40
10
10
0
100
5
5
10
10
V
DD
3.0 to 3.6V
Min
0
30
30
10
10
0
80
5
5
10
10
Max
10
30
40
50
50
30
30
Max
14
25
30
50
50
25
25
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1, 2
1
3
2
4
4
3
3
Min
10
0
50
100
Max
-
-
-
-
Units
ms
μ
s
μ
s/V
μ
s/V
Notes
1,2
1,2
Min
-
-
Max
8
6
Units
pF
pF
Notes
1
1
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