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參數(shù)資料
| 型號： | FM25640 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TERM STRIP, TH, LO PRO |
| 中文描述： | 64Kb的FRAM的串行存儲器 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 131K |
| 代理商： | FM25640 |
FM25640
Rev. 2.1
Aug 2003
2 of 14
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
Address Register
Counter
`
2,048 x 32
FRAM Array
13
Data I/O Register
8
Nonvolatile Status
Register
3
WP
CS
HOLD
SCK
SO
Figure 1. Block Diagram
Pin Description
Pin Name
/CS
I/O
Input
Pin Description
Chip Select. Activates the device. When high, all outputs are tri-state and the device
ignores other inputs. The part remains in a low-power standby mode. When low, the part
recognizes activity on the SCK signal. A falling edge on /CS must occur prior to every
op-code.
Serial Clock. All I/O activity is synchronized to the serial clock. Inputs are latched on the
rising edge and outputs occur on the falling edge. The part is static so the clock
frequency may be any value between 0 and 5 MHz and may be interrupted at any time.
Hold. The /HOLD signal is used when the host CPU must interrupt a memory operation
for another task. Taking the /HOLD signal to a low state pauses the current operation.
The part ignores any transition on SCK or /CS. All transitions on /HOLD must occur
while SCK is low.
Write Protect. This pin prevents write operations to the status register. This is critical
since other write protection features are controlled through the status register. A
complete explanation of write protection is provided below. *Note that the function of
/WP is different from the FM25040 where it prevents all writes to the part.
Serial Input. All data is input to the device on this pin. The pin is sampled on the rising
edge of SCK and is ignored at other times. It should always be driven to a valid logic
level to meet IDD specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output. SO is the data output pin. It is driven actively during a read and remains
tri-state at all other times including when HOLD\ is low. Data transitions are driven on
the falling edge of the serial clock.
* SO can be connected to SI for a single pin data interface since the part communicates
in half-duplex.
Supply Voltage: 5V
Ground
SCK
Input
/HOLD
Input
/WP
Input
SI
Input
SO
Output
VDD
VSS
Supply
Supply
相關PDF資料 |
PDF描述 |
|---|---|
| FM25640-S | LOW PROFILE .025 SQ STRIPS |
| FM25CL04 | 4Kb FRAM Serial 3V Memory |
| FM25CL04-S | 4Kb FRAM Serial 3V Memory |
| FM25CL64 | 4Kb FRAM Serial 3V Memory |
| FM25CL64-S | 4Kb FRAM Serial 3V Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FM25640_05 | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:64Kb FRAM Serial Memory |
| FM25640_07 | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:64Kb FRAM Serial Memory |
| FM25640B | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:64Kb Serial 5V F-RAM Memory |
| FM25640B_13 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64Kb Serial 5V F-RAM Memory |
| FM25640B-G | 功能描述:F-RAM 64Kb Serial SPI 5V FRAM RoHS:否 存儲容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
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