參數(shù)資料
型號: FLE Series
英文描述: Flash Memory Card 8 MB Through 64 MB (AMD Based)(8M字節(jié)-64M字節(jié)閃速存儲器卡(基于AMD))
中文描述: 閃存卡8兆,通過64兆(基于AMD)(800萬字節(jié),6400字節(jié)閃速存儲器卡(基于AMD)的)
文件頁數(shù): 4/12頁
文件大?。?/td> 118K
代理商: FLE SERIES
August 2000 Rev. 4 - ECO #13129
4
PCMCIA Flash Memory Card
FLE Series
PC Card Products
Symbol
A0 - A25
Type
Name and Function
INPUT
ADDRESS INPUTS:
A0 through A25 enable direct addressing of
up to 64MB of memory on the card. Signal A0 is not used in word
access mode. A25 is the most significant bit
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the
bi-directional databus. DQ15 is the MSB.
CARD ENABLE 1 AND 2:
CE1# enables even byte accesses, CE2#
enables odd byte accesses. Multiplexing A0, CE1# and CE2# allows
8-bit hosts to access all data on DQ0 - DQ7.
OUTPUT ENABLE:
Active low signal gating read data from the
memory card.
WRITE ENABLE:
Active low signal gating write data to the
memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase
or program algorithms. A high output indicates that the card is ready
to accept accesses. A low output indicates that one or more devices
in the memory card are busy with internally timed erase or write
activities.
CARD DETECT 1 and 2:
Provide card insertion detection. These
signals are connected to ground internally on the memory card. The
host socket interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
WRITE PROTECT:
Write protect reflects the status of the Write
Protect switch on the memory card. WP set to high = write protected,
providing internal hardware write lockout to the Flash array.
If card does not include optional write protect switch, this signal will
be pulled low internally indicating write protect = "off".
PROGRAM/ERASE POWER SUPPLY:
Not connected for 5V
only card.
CARD POWER SUPPLY:
5.0V for all internal circuitry.
GROUND:
for all internal circuitry.
ATTRIBUTE MEMORY SELECT :
provides access to Flash
memory card registers and Card Information Structure in the
Attribute Memory Plane.
RESET:
Active high signal for placing card in Power-on default
state. Reset can be used as a Power-Down signal for the memory
array.
WAIT:
This signal is pulled high internally for compatibility. No
wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to
maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V card has been
inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven
or left floating
DQ0 - DQ15
INPUT/OUTPUT
CE1#, CE2#
INPUT
OE#
INPUT
WE#
INPUT
RDY/BSY#
OUTPUT
CD1#, CD2#
OUTPUT
WP
OUTPUT
VPP1, VPP2
N.C.
VCC
GND
REG#
INPUT
RST
INPUT
WAIT#
OUTPUT
BVD1, BVD2
OUTPUT
VS1, VS2
OUTPUT
RFU
N.C.
Card Signal Description
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