參數(shù)資料
型號(hào): FDS6299S
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號(hào)晶體管
英文描述: 30V N-Channel PowerTrench SyncFET
中文描述: 21000 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SO-8
文件頁(yè)數(shù): 2/6頁(yè)
文件大小: 114K
代理商: FDS6299S
FDS6299S Rev C (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ Max Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
GS
= 0 V,
I
D
= 1 mA, Referenced to 25
°
C
V
DS
= 24 V,
V
GS
= 0 V
V
GS
= ±20 V,
V
DS
= 0 V
I
D
= 1 mA
30
V
32
mV/
°
C
μ
A
nA
500
±100
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= 1 mA, Referenced to 25
°
C
V
GS
= 10 V,
I
D
= 21 A
V
GS
= 4.5 V,
I
D
= 19 A
V
GS
=10 V, I
D
=21 A, T
J
=125
°
C
V
DS
= 10 V,
I
D
= 21 A
I
D
= 1 mA
1
1.7
3
V
–4
mV/
°
C
m
3.3
4.1
4.5
3.9
5.1
5.6
g
FS
Forward Transconductance
94
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
3880
1030
310
1.8
pF
pF
pF
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 15 mV,
f = 1.0 MHz
0.4
3.1
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g(TOT)
Total Gate Charge at V
GS
=10V
Q
g
Total Gate Charge at V
GS
=5V
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
12
12
60
35
58
31
11
8
22
22
96
56
81
43
ns
ns
ns
ns
nC
nC
nC
nC
V
DD
= 15 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 15 V,
I
D
= 21 A
Drain–Source Diode Characteristics and Maximum Ratings
V
SD
Drain–Source Diode Forward Voltage
t
rr
Diode Reverse Recovery Time
I
RM
Diode Reverse Recovery Current
Q
rr
Diode Reverse Recovery Charge
V
GS
= 0 V,
I
F
= 21 A,
dI
F
/dt = 300 A/μs
I
S
= 3.5 A
(Note 2)
420
32
2.1
34
700
mV
ns
A
nC
(Note 3)
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a) 50°/W when
mounted on a 1 in
2
pad of 2 oz copper
b) 105°/W when
mounted on a .04 in
2
pad of 2 oz copper
c) 125°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%.
3. See “SyncFET Schottky body diode characteristics” below.
F
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