參數(shù)資料
型號: FBL2040BB
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 3.3V BTL8-bit TTL to BTL transceiver
中文描述: FBL SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PQFP52
文件頁數(shù): 4/12頁
文件大?。?/td> 87K
代理商: FBL2040BB
Philips Semiconductors
Product specification
FBL2040
3.3V BTL 8-bit TTL to BTL transceiver
1998 Dec 07
4
PIN DESCRIPTION
SYMBOL
AI0 – AI7
AO0 – AO7
PIN NUMBER
51, 2, 3, 8, 9, 14, 18, 24
50, 52, 4, 6, 10, 12, 16, 20
40, 38, 36, 34,
32, 30, 28, 26
46
45
47
41, 39, 37, 35, 33, 31, 29, 27
1, 5, 7, 11, 13, 15
23, 43
49
17
19
48
42
44
22
21
25
TYPE
Input
Output
NAME AND FUNCTION
Data inputs (TTL)
3-state outputs (TTL)
B0 – B7
I/O
Data inputs/Open Collector outputs. High current drive (BTL)
OEB0
OEB1
OEA
BUS GND
LOGIC GND
BUS V
CC
LOGIC V
CC
BG V
CC
BG GND
BIAS V
TMS
TCK
TDI
TDO
NC
Input
Input
Input
GND
GND
Power
Power
Power
GND
Power
Input
Input
Input
Output
NC
Enables the B outputs when High
Enables the B outputs when Low
Enables the A outputs when High
Bus ground (0V)
Logic ground (0V)
Positive supply voltage
Positive supply voltage
Band Gap threshold voltage reference
Band Gap threshold voltage reference ground
Live insertion pre-bias pin
Test Mode Select (optional, if not implemented then no-connect)
Test Clock (optional, if not implemented then no-connect)
Test Data In (optional, if not implemented then shorted to TDO)
Test Data Out (optional, if not implemented then shorted to TDI)
No Connect
FUNCTION TABLE
MODE
INPUTS
OEB0
H
H
H
H
L
X
L
X
X
L
X
OUTPUTS
AOn
Z
Z
L
H
X
X
H
L
H
L
Z
AIn
L
H
L
H
X
X
X
X
X
X
Bn*
X
X
L
H
L
H
X
OEB1
L
L
L
L
X
H
X
H
H
X
X
OEA
L
L
H
H
X
X
H
H
H
H
L
Bn*
H**
L
H**
L
H**
H**
Input
Input
Input
Input
X
AIn to Bn
Disable Bn outputs
Disable Bn out uts
Bn to AOn
Disable AOn outputs
H** =
B*
Goes to level of pull-up voltage
Precaution should be taken to ensure B inputs do not float. If they do, they are equal to Low state.
=
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