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參數(shù)資料
| 型號： | FAN5660MX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHED CAPACITOR CONVERTER, 90 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 314K |
| 代理商： | FAN5660MX |
FAN5660
Pr
eliminar
y
Infor
mation
4
REV. 0.8.3 3/8/02
Detailed Description
The FAN5660 capacitive charge-pump circuit either inverts,
splits or doubles the input voltage (see Typical Circuits).
For highest performance, low effective series resistance
(ESR) capacitors should be used (see Capacitor Selection
section for more details). When using the inverting mode
with a supply voltage less than 2V, LV may be connected to
VSS. This bypasses the internal regulator circuitry and pro-
vides best performance in low-voltage applications. When
using the inverter mode with a supply voltage above 2V, LV
must be left open.
Applications Information
Negative Voltage Converter
The most common application of the FAN5660 is as a
charge-pump voltage inverter.
The operating circuit uses
only two external capacitors, C1 and C2 (see Typical Cir-
cuits). Even though its output is not actively regulated, the
FAN5660 is very insensitive to load current changes. A typ-
ical output source resistance of 5
means that with an input
of +5V the output voltage is -5V under light load, and
decreases only to 4.5V with a load of 100mA.
Capacitors selection
Low ESR capacitors should be used at the output of
FAN5660 to minimize output ripple. This can be achieved
using ceramic capacitors, but may also be met with certain
types of tantalum capacitors.
Output ripple voltage is calculated taking into account that
the output current is solely supplied from capacitor C2 dur-
ing one-half of the charge-pump cycle. This introduces a
peak-to-peak ripple of:
V RIPPLE =
+ I VSH (ESRC2)
For a nominal fPUMP of 5kHz and C2 = 100F with an
ESR of 0.05
, ripple is approximately 100mV with a
100mA load current. If C2 is raised to 470F, the ripple
drops to approximately 25mV.
Positive Voltage Doubler
The FAN5660 operates in the voltage-doubling mode as
shown in the Typical Circuit. The no-load output is 2 x VIN.
Positive Voltage Splitter
The FAN5660 operates in voltage splitting mode as shown in
the Typical Circuit. The no-load output is VIN/2.
Changing Oscillator Frequency
Three modes control the FAN5660's clock frequency, as
listed below:
When FC and SYNC are unconnected (open), the Oscillator
runs at 5kHz typically. When FC is connected to V+, the
charge and discharge current change from 1.0A to 10.0A,
thus increasing the Oscillator frequency 10 times. In the
inverter mode, SYNC may also be overdriven by an external
clock source. A square wave signal of maximum 2V peak-
to-peak may be applied to SYNC via a 2 to 5nF capacitor to
overdrive the internal oscillator. When SYNC is overdriven,
FC has no effect. In some applications, the 5kHz output rip-
ple frequency may be low enough to interfere with other cir-
cuitry.
If desired, the Oscillator frequency can then be
increased through use of the FC pin or an external Oscillator
as described above. Increasing the clock frequency increases
the FAN5660's quiescent current, but also allows smaller
capacitance values to be used for C1 and C2.
+
1
2
3
4
8
7
6
5
FC
CAP+
FAN5660
VSS
CAP-
SYNC
LV
VSH
V+
C2
C1
RL
V+
+
V+ (5V)
N/C
Figure 1: Test Circuuit
I VSH
2(f PUMP)(C2)
FC
SYNC
Oscillator Frequency
Open
5kHz
FC = V+
Open
50kHz
Open
External
Clock
External Clock
Frequency
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