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參數(shù)資料
| 型號： | EXPANDIO-USB-PT-FS |
| 廠商： | Flexipanel |
| 文件頁數(shù)： | 13/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER USB 32B 44TQFP |
| 標準包裝： | 25 |
| 系列： | expandIO-USB™ |
| 接口： | USB |
| 輸入/輸出數(shù)： | 32 |
| 中斷輸出： | 無 |
| 頻率 - 時鐘： | 375kHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應(yīng)商設(shè)備封裝： | 44-QFP |
| 包裝： | 散裝 |
| 產(chǎn)品目錄頁面： | 659 (CN2011-ZH PDF) |
| 其它名稱： | 658-1039-5 |
p7
22-Nov-10
expandIO-USB
HW148-18
www.firmwarefactory.com
i.e.
(Byte2) = 3 / 2 / (Bus Freq)
The lowest permitted value is 0x0F, giving a maximum
bus frequency of 93.75kHz for expandIO-USB and
125kHz for USB-XP.
Byte 3 bits 7-4 indicate the port (A=0001, B=0010…)
and byte 2 bits 2-0 indicate the bit (0-7) to be used as
the SCIO pin.
Multiple UNI/O buses can be implemented on separate
I/O buses. This is useful for avoiding address conflicts,
is subject to the restriction that the frequency of all
buses will be equal to that specified by the most recent
Set Serial command. The TMR1 and CCP1 resources
are used.
I2C: If byte 1 bit 0 is one, the MSSP port is configured
for I2C operation. The SCL pin in the pin diagrams
becomes the master clock and the SDA pin becomes
the bidirectional data line. Both should be pulled up by
4k7 resistors to Vdd.
Byte 1 bit 1 specifies whether the slew rate control is
disabled (1, for 100kHz and 1MHz operation) or enabled
(0, for 400kHz operation).
Byte 2 specifies the clock baud rate, as given by the
following formula:
FO/(4 * (Byte2 + 1))
Example using expandIO-USB:
93 01 3B 00
Command: I2C on, no slew, 100kHz
93 01 3B 00 Response: OK
Execute SPI
The identifier EXESPI (0xAF) cycles data through the
SPI port. In the command, byte 1 is the number of bytes
to be exchanged and bytes 2 onwards are the data to
send to the slave device. In the response, byte 1 is the
number of bytes that were exchanged and bytes 2
onwards are the data received from the slave device.
The EXESPI command and response are not limited to
4 bytes in length. They may use as many bytes in the
report as required. If the total length of the command is
greater than 4 bytes, they must be the first and only
command/response in the report.
Example:
AF 03 45 67 00
Command: Send 45 67 00 to slave
AF 03 00 00 89 Response: Slave sent 00 00 89
(From rev 0009 only.) If byte 1 bit 7 is set, two bytes are
appended to the end of the command. These are
appended to the end of the response, allowing the PC to
easily match command / response pairs.
Execute UNI/O
(From revision 0008 only.)
The identifier EXEUNIO (0xB0) engages in UNI/O
communication with a slave device connected to the
SCIO pin indicated by byte 1. (Bits 7-4 indicate the port
(A=0001, B=0010…) and bits 2-0 indicate the bit (0-7) to
be used as the SCIO pin. The other bits should be set
to zero.) ‘Hold mode’ is not required of slave devices.
Bytes 2 and 3 are the slave device address. For 8-bit
addresses, byte 2 should be zero and byte 3 should be
the entire slave address. For 12-bit addresses, byte 2
bits 0:3 should be the device high address (i.e. device
family), byte 2 bits 4..7 should all be set to ‘1’, and byte
3 should be the device code.
If byte 5 bit 7 is set, no UNI/O command is sent and only
a device poll is performed. If byte 5 bit 7 is clear, Byte 4
is the UNI/O command.
Byte 5 bits 5-0 are the number of bytes to write
immediately after the UNI/O command. The actual data
bytes are given in bytes 7 onwards. Byte 5 bit 6 is 1 if a
600μs standby pulse is not required prior to sending the
UNI/O command. This bit should only be set if this
command immediately follows another to be transmitted
to the same device.
Byte 6 bits 5-0 are the number of bytes to read after the
data bytes have been written. If byte 6 bit 7 is non-zero,
the device will enter a 250-bus-clock-cycle device hold
state prior to all Master Acknowledge bits, e.g. approx
25ms for 10kHz clock.
In the response, byte 1 is a status value as shown in
table 6, and bytes 2 onwards are the data received from
the slave device. expandIO-USB will acknowledge all
but the last data byte received.
Interrupts are disabled during the execution of
EXEUNIO commands. If byte 6 bit 6 is non-zero then all
interrupt-on-change flags (INTxIF / RBIF / RABIF) flags
are cleared immediately prior to re-enabling interrupts,
and the SCIO line operates as an input when
transmission of the command is complete.
In order to accommodate interrupt pulses the master will
always ensure the SCIO line has been high for at least
600μs before starting transmission, and the initial pulse
of the start header THDR will be a minimum of15μs. If
byte 1 bit 3 is non-zero, the start header initial pulse is
extended to 100ms.
Slaves generate interrupts by pulsing SCIO low. To
detect these interrupt pulses:
1. Select an SCIO I/O pin that has interrupt capability.
2. Ensure SCIO has a weak pull-up resistor (e.g. 22k).
3. Ensure byte 6 bit 6 was set in the preceding
EXEUNIO command
4. Clear the interrupt flag and enable the interrupt.
5. When an INTERRUPT (0x95) message is received,
poll all devices that could have generated the
interrupt to identify which device generated the
interrupt.
6. Repeat from step 2.
Table 6. UNI/O status values
Value
Meaning
00
Success
03
No slave acknowledge received
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