1-20 Revision 10 The estimation of the dynamic power dissipation is a piece-wise linear summation of the " />
參數(shù)資料
型號(hào)： EX64-PTQ64
廠商： Microsemi SoC
文件頁(yè)數(shù)： 17/48頁(yè)
文件大小： 0K
描述： IC FPGA ANTIFUSE 3K 64-TQFP
標(biāo)準(zhǔn)包裝： 160
系列： EX
邏輯元件/單元數(shù)： 128
輸入/輸出數(shù)： 41
門數(shù)： 3000
電源電壓： 2.3 V ~ 2.7 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-TQFP（10x10）
eX FPGA Architecture and Characteristics
1-20
Revision 10
The estimation of the dynamic power dissipation is a piece-wise linear summation of the power
dissipation of each component.
Dynamic power dissipation = VCCA2 * [(mc * Ceqcm * fmC)Comb Modules + (ms * Ceqsm * fmS)Seq Modules
+ (n * Ceqi * fn)Input Buffers + (0.5 * (q1 * Ceqcr * fq1) + (r1 * fq1))RCLKA + (0.5 * (q2 * Ceqcr * fq2)
+ (r2 * fq2))RCLKB + (0.5 * (s1 * Ceqhv * fs1)+(Ceqhf * fs1))HCLK] + VCCI2 * [(p * (Ceqo + CL)
* fp)Output Buffers]
where:
The eX, SX-A and RTSX-S Power Calculator can be used to estimate the total power dissipation (static
mc
= Number of combinatorial cells switching at frequency fm, typically 20% of C-cells
ms
= Number of sequential cells switching at frequency fm, typically 20% of R-cells
n
= Number of input buffers switching at frequency fn, typically number of inputs / 4
p
= Number of output buffers switching at frequency fp, typically number of outputs / 4
q1
= Number of R-cells driven by routed array clock A
q2
= Number of R-cells driven by routed array clock B
r1
= Fixed capacitance due to routed array clock A
r2
= Fixed capacitance due to routed array clock B
s1
= Number of R-cells driven by dedicated array clock
Ceqcm = Equivalent capacitance of combinatorial modules
Ceqsm = Equivalent capacitance of sequential modules
Ceqi
= Equivalent capacitance of input buffers
Ceqcr = Equivalent capacitance of routed array clocks
Ceqhv = Variable capacitance of dedicated array clock
Ceqhf = Fixed capacitance of dedicated array clock
Ceqo
= Equivalent capacitance of output buffers
CL
= Average output loading capacitance, typically 10 pF
fmc
= Average C-cell switching frequency, typically F/10
fms
= Average R-cell switching frequency, typically F/10
fn
= Average input buffer switching frequency, typically F/5
fp
= Average output buffer switching frequency, typically F/5
fq1
= Frequency of routed clock A
fq2
= Frequency of routed clock B
fs1
= Frequency of dedicated array clock
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EX64-PTQ64I 功能描述:IC FPGA ANTIFUSE 3K 64-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:EX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
EX64-PTQ64PP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs
EX64-PTQG100 功能描述:IC FPGA ANTIFUSE 3K 100-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:EX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
EX64-PTQG100A 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:eX Automotive Family FPGAs
EX64-PTQG100I 功能描述:IC FPGA ANTIFUSE 3K 100-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:EX 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14）
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