I2C INTERFACE SDA generates the serial control da" />
參數(shù)資料
型號(hào): EVAL-SSM2380Z
廠商: Analog Devices Inc
文件頁(yè)數(shù): 17/32頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SSM2375
標(biāo)準(zhǔn)包裝: 1
放大器類型: D 類
輸出類型: 2 通道(立體聲)
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量: 3.2W x 2 @ 4 歐姆
板類型: 完全填充
已用 IC / 零件: SSM2380
已供物品:
SSM2380
Rev. A | Page 24 of 32
I2C INTERFACE
SDA generates the serial control data-word, and SCK clocks the
serial data. The I2C bus address (Bits[A7:A1]) is 0x31 (01100010
for write and 01100011 for read). Bit A0 is the designated
read/write bit.
The I2C interface provides access to the user-selectable control
registers and operates with a 2-wire interface.
Each control register consists of 16 bits, MSB first. Bits[B15:B9]
are the register map address, and Bits[B8:B0] are the register data
for the associated register map.
08
75
2-
00
9
P
9
8
1TO 7
9
8
1TO 7
9
8
1TO 7
S
SDA
SCK
START
ADDR
R/W
ACK
SUBADDRESS
ACK
STOP
DATA
Figure 49. SSM2380 2-Wire I2C Generalized Clocking Diagram
08
75
2-
010
WRITE
SEQUENCE
READ
SEQUENCE
SA1
A7
A0
A(S)
S
B15
B9
0
01
0P
0
...
A1
A7
A0
A(S)
...
B0
B8
B7
A(M)
...
B0
B7
P
...
DEVICE
ADDRESS
DEVICE
ADDRESS
REGISTER
ADDRESS
SA1
A7
A0
A(S)
B15
B9
B8
0
...
DEVICE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
(SLAVE DRIVE)
REGISTER
DATA
S =
P =
A0 =
A(S) =
A(M) =
START BIT.
STOP BIT.
I2C R/W BIT.
ACKNOWLEDGE BY SLAVE.
ACKNOWLEDGE BY MASTER.
ACKNOWLEDGE BY MASTER (INVERSION).
Figure 50. I2C Write and Read Sequences
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