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| 型號： | EVAL-ADG2108EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADG2108 |
| 產(chǎn)品變化通告： | Interface Change Notice 12/Apr/2010 |
| 標準包裝： | 1 |
| 主要目的： | 計時，頻率合成器 |
| 已用 IC / 零件： | ADG2108 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | ADG2108BCPZ-REEL7DKR-ND - IC CROSSPOINT SWIT 8X10 32LFCSP ADG2108YCPZ-HS-RL7-ND - IC CROSSPOINT SWIT 8X10 32LFCSP ADG2108BCPZ-HS-RL7TR-ND - IC CROSSPOINT SWIT 8X10 32LFCSP ADG2108YCPZ-REEL7CT-ND - IC CROSSPOINT SWIT 8X10 32LFCSP ADG2108BCPZ-REEL7CT-ND - IC CROSSPOINT SWIT 8X10 32LFCSP ADG2108YCPZ-REEL7TR-ND - IC CROSSPOINT SWIT 8X10 32LFCSP ADG2108BCPZ-REEL7TR-ND - IC CROSSPOINT SWIT 8X10 32LFCSP |
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I2C CMOS 8 × 10 Unbuffered Analog
Switch Array with Dual/Single Supplies
Data Sheet
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006–2012 Analog Devices, Inc. All rights reserved.
FEATURES
I2C-compatible interface
3.4 MHz high speed I2C option
32-lead LFCSP_WQ (5 mm × 5 mm)
Double-buffered input logic
Simultaneous update of multiple switches
Up to 300 MHz bandwidth
Fully specified at dual ±5 V/single +12 V operation
On resistance 35 maximum
Low quiescent current < 20 A
APPLICATIONS
AV switching in TV
Automotive infotainment
AV receivers
CCTV
Ultrasound applications
KVM switching
Telecom applications
Test equipment/instrumentation
PBX systems
GENERAL DESCRIPTION
The ADG2108 is an analog cross point switch with an
array size of 8 × 10. The switch array is arranged so that
there are eight columns by 10 rows, for a total of 80 switch
channels. The array is bidirectional, and the rows and columns
can be configured as either inputs or outputs. Each of the 80
switches can be addressed and configured through the I2C-
compatible interface. Standard, full speed, and high speed
(3.4 MHz) I2C interfaces are supported. Any simultaneous
switch combination is allowed. An additional feature of the
ADG2108 is that switches can be updated simultaneously,
using the LDSW command. In addition, a RESET option
allows all of the switch channels to be reset/off. At power on,
all switches are in the off condition. The device is packaged
in a 32-lead, 5 mm × 5 mm LFCSP_WQ.
FUNCTIONAL BLOCK DIAGRAM
ADG2108
VDD
VSS
VL
SCL
SDA
X0 TO X9 (I/O)
8 × 10 SWITCH ARRAY
LDSW
80
1
80
1
INPUT
REGISTER
AND
7 TO 80
DECODER
LATCHES
LDSW
GND
A0
A1
A2
Y0 TO Y7 (I/O)
05898-
001
Figure 1.
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