參數(shù)資料
型號(hào)： EVAL-ADF7012EB1
廠商： Analog Devices, Inc.
英文描述： Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter
中文描述： 多通道ISM頻段FSK信號(hào)/的GFSK /元件Ook /約克/ ASK發(fā)射
文件頁(yè)數(shù)： 21/28頁(yè)
文件大小： 772K
代理商： EVAL-ADF7012EB1
ADF7012
433 MHZ OPERATION
The recommendations here are guidelines only. The design
should be subject to internal testing prior to ETSI site testing.
Matching components need to be adjusted for board layout.
Rev. 0 | Page 21 of 28
The ETSI standard EN 300-220 governs operation in the
433.050 MHz to 434.790 MHz band. For many systems, 10%
duty is sufficient for the transmitter to output 10 dBm.
Design Criteria
433.92 MHz center frequency
FSK modulation
10 mW output power
200 m range
Meets ETSI 300-220
The main requirement in the design of this remote is a long
battery life and sufficient range. It is possible to adjust the
output power of the ADF7012 to increase the range depending
on the antenna performance.
The center frequency is 433.92 MHz. It is possible to operate the
VCO at this frequency. Figure 36 shows the inductor value vs.
center frequency. The inductor chosen is 22 nH. Coilcraft
inductors such as 0603-CS-22NXJBU are recommended.
Crystal and PFD
The phase noise requirement is such to ensure the power at the
edge of the band is < 36 dBm. The PFD is chosen so as to
minimize spurious levels (beat note and reference), and to
ensure a quick crystal power-up time.
PFD = 4.9152 MHz Power-Up Time 1.6 ms. Figure 10 shows a
typical power-up time for a 4 MHz crystal.
N-Divider
The N Divider is determined as being:
Nint = 88
Nfrac = (1152)/4096
VCO divide-by-2 is not enabled
Deviation
The deviation is set to ± 50 kHz so as to accommodate a simple
receiver architecture.
The modulation steps available are in 4.9152 MHz/2
14
:
Modulation steps = 300 Hz
Modulation number = 50 kHz/300Hz = 167
Bias Current
Because low current is desired, a 2.0 mA VCO bias can be used.
Additional bias current reduces any spurious, but increases
current consumption.
The PA bias can be set to 5.5 mA and achieve 10 dBm.
Loop Filter Bandwidth
The loop filter is designed with ADIsimPLL Version 2.5. The
loop bandwidth design requires that the channel power be
< 36 dBm at ±870 kHz from the center. A loop bandwidth of
close to 160 kHz strikes a good balance between lock time for
data rates, including 32 kbps and spurious suppression. If it is
found that pulling of the VCO is more than desired in OOK
mode, the bandwidth could be increased.
Design of Harmonic Filter
The main requirement of the harmonic filter should ensure
that the third harmonic level is < 30 dBm. A fifth-order
Chebyshev filter is recommended to achieve this, and a
suggested starting point is given next. The Pi format is chosen
to minimize the more expensive inductors.
Component Values—Crystal: 4.9152 MHz
Loop Filter
Icp
2.0 mA
LBW
100 kHz
C1
680 pF
C2
12 nF
C3
270 pF
R1
910 V
R2
3.3 kV
Matching
L1
L2
C14
C15
22 nH
10 pF
Short
Open
Harmonic Filter
L4
L5
CF1
CF2
CF3
22 nH
22 nH
3.3 pF
8.2 pF
3.3 pF
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADF7012EB2 制造商:AD 制造商全稱:Analog Devices 功能描述:Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter
EVAL-ADF7012EB3 制造商:AD 制造商全稱:Analog Devices 功能描述:Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter
EVAL-ADF7012EB4 制造商:AD 制造商全稱:Analog Devices 功能描述:Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter
EVAL-ADF7012EB5 制造商:AD 制造商全稱:Analog Devices 功能描述:Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter
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