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參數(shù)資料
| 型號： | EVAL-ADF4360-8EB1 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | XO, clock |
| 英文描述： | Integrated Synthesizer and VCO |
| 中文描述： | 綜合合成器和VCO |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 434K |
| 代理商： | EVAL-ADF4360-8EB1 |
ADF4360-8
Parameter
RF OUTPUT CHARACTERISTICS
5
Maximum VCO Output Frequency
Rev. 0 | Page 4 of 24
B Version
400
Unit
MHz
Conditions/Comments
I
CORE
= 5 mA. Depending on L. See the
Choosing the Correct Inductance Value section.
L1, L2 = 270 nH. See the Choosing the Correct Inductance Value
section for other frequency values.
F
MAX
/ F
MIN
L1, L2 = 270 nH. See the Choosing the Correct Inductance Value
section for other sensitivity values.
To within 10 Hz of final frequency.
Into 2.00 VSWR load.
Using tuned load, programmable in 3 dB steps. See Table 7.
Using 50 resistors to V
VCO
, programmable in 3 dB steps. See Table 7.
@ 100 kHz offset from carrier.
@ 800 kHz offset from carrier.
@ 3 MHz offset from carrier.
@ 10 MHz offset from carrier.
@ 200 kHz PFD frequency.
@ 1 MHz PFD frequency.
@ 8 MHz PFD frequency.
@ 1 kHz offset from carrier.
100 Hz to 100 kHz.
Minimum VCO Output Frequency
VCO Output Frequency
65
88/108
MHz
MHz min/max
VCO Frequency Range
VCO Sensitivity
1.2
2
Ratio
MHz/V typ
Lock Time
6
Frequency Pushing (Open Loop)
Frequency Pulling (Open Loop)
Harmonic Content (Second)
Harmonic Content (Third)
Output Power
5, 7
Output Power
5, 8
Output Power Variation
VCO Tuning Range
NOISE CHARACTERISTICS
5
VCO Phase Noise Performance
9
Synthesizer Phase Noise Floor
10
Phase Noise Figure of Merit
10
In-Band Phase Noise
11, 12
RMS Integrated Phase Error
13
Spurious Signals due to PFD
Frequency
12,
14
Level of Unlocked Signal with
MTLD Enabled
400
0.24
10
16
21
9/0
14/9
±3
1.25/2.5
120
139
140
142
160
150
142
209
102
0.09
75
μs typ
MHz/V typ
Hz typ
dBc typ
dBc typ
dBm typ
dBm typ
dB typ
V min/max
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
Degrees typ
dBc typ
70
dBm typ
1
Operating temperature range is –40°C to +85°C.
2
Guaranteed by design. Sample tested to ensure compliance.
3
I
CP
is internally modified to maintain constant loop gain over the frequency range.
4
T
A
= 25°C; AV
DD
= DV
DD
= V
VCO
= 3.3 V.
5
Unless otherwise stated, these characteristics are guaranteed for VCO core power = 5 mA. L1, L2 = 270 nH, 470 resistors to GND in parallel with L1, L2.
6
Jumping from 88 MHz to 108 MHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
7
For more detail on using tuned loads, see Output Matching section.
8
Using 50 resistors to V
VCO
, into a 50 load.
9
The noise of the VCO is measured in open-loop conditions.
10
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log
N
(where
N
is the N divider value). The
phase noise figure of merit subtracts 10 log (PFD frequency).
11
The phase noise is measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REFIN for the
synthesizer; offset frequency = 1 kHz.
12
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; N = 1000; Loop B/W = 10 kHz.
13
f
REFIN
= 10 MHz; f
PFD
= 1 MHz; N = 120; Loop B/W = 100 kHz.
14
The spurious signals are measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REFIN
for the synthesizer; f
REFOUT
= 10 MHz @ 0 dBm.
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