Data Sheet
AD9835
Rev. A | Page 3 of 28
SPECIFICATIONS
VDD = +5 V ± 5%; AGND = DGND = 0 V; TA = TMIN to TMAX; REFIN = REFOUT; RSET = 3.9 kΩ; RLOAD = 300 Ω for IOUT, unless otherwise
Table 1.
Min
Typ
Max
Units
Test Conditions/Comments
SIGNAL DAC SPECIFICATIONS
Resolution
10
Bits
Update Rate (fMAX)
50
MSPS
IOUT Full Scale
4
mA
4.75
mA
Output Compliance
1.35
V
DC Accuracy
Integral Nonlinearity
±1
LSB
Differential Nonlinearity
±0.5
LSB
Dynamic Specifications
Signal-to-Noise Ratio
50
dB
fMCLK = 50 MHz, fOUT = 1 MHz
Total Harmonic Distortion
52
dBc
fMCLK = 50 MHz, fOUT = 1 MHz
Spurious Free Dynamic Range (SFDR)
3fMCLK = 6.25 MHz, fOUT = 2.11 MHz
Narrow Band (±50 kHz)
72
dBc
Wide Band (±2 MHz)
50
dBc
Clock Feedthrough
60
dBc
Wake-Up Time
1
ms
Power-Down Option
Yes
VOLTAGE REFERENCE
Internal Reference @ +25° C
1.21
V
TMIN to TMAX
1.131
1.29
V
REFIN Input Impedance
10
MΩ
Reference TC
100
ppm/°C
REFOUT Output Impedance
300
Ω
LOGIC INPUTS
VINH, Input High Voltage
DVDD 0.9
V
VINL, Input Low Voltage
0.9
V
IINH, Input Current
10
μA
CIN, Input Capacitance
10
pF
POWER SUPPLIES
fMCLK = 50 MHz
AVDD
4.75
5.25
V min/V max
DVDD
4.75
5.25
V min/V max
IAA
5
mA max
IDD
2.5 +
0.33/MHz
mA typ
40
mA max
Low Power Sleep Mode
0.35
mA max
1 Operating temperature range is as follows: B Version: 40°C to +85°C.
2 100% production tested.
3 fMCLK = 6.25 MHz, Frequency Word = 5671C71C HEX, fOUT = 2.11 MHz.
4 Measured with the digital inputs static and equal to 0 V or DVDD. The AD9835 is tested with a capacitive load of 50 pF. The part can be operated with higher capacitive
loads, but the magnitude of the analog output will be attenuated. See
Figure 7.