- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄17049 > EVAL-AD7949EDZ (Analog Devices Inc)BOARD EVAL AD7949 PDF資料下載
參數(shù)資料
| 型號： | EVAL-AD7949EDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL AD7949 |
| 標準包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±VREF |
| 在以下條件下的電源（標準）： | 10.8mW @ 250kSPS，5V |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7949 |
| 已供物品： | 板 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
AD7949
Data Sheet
Rev. D | Page 28 of 32
READ/WRITE SPANNING CONVERSION WITHOUT
A BUSY INDICATOR
This mode is used when the AD7949 is connected to any host
using an SPI, serial port, or FPGA. The connection diagram is
shown in Figure 39, and the corresponding timing is given in
Figure 40. For the SPI, the host should use CPHA = CPOL = 0.
Reading/writing spanning conversion is shown, which covers
all three modes detailed in the Digital Interface section. For this
mode, the host must generate the data transfer based on the
conversion time. For an interrupt driven transfer that uses a
busy indicator, refer to the Read/Write Spanning Conversion
with a Busy Indicator section.
A rising edge on CNV initiates a conversion, forces SDO to
high impedance, and ignores data present on DIN. After a
conversion is initiated, it continues until completion irrespec-
tive of the state of CNV. CNV must be returned high before the
safe data transfer time, tDATA, and then held high beyond the
conversion time, tCONV, to avoid generation of the busy signal
indicator.
After the conversion is complete, the AD7949 enters the
acquisition phase and power-down. When the host brings CNV
low after tCONV (maximum), the MSB is enabled on SDO. The
host also must enable the MSB of the CFG register at this time
(if necessary) to begin the CFG update. While CNV is low, both
a CFG update and a data readback take place. The first 14 SCK
rising edges are used to update the CFG, and the first 13 SCK
falling edges clock out the conversion results starting with
MSB 1. The restriction for both configuring and reading is
that they both must occur before the tDATA time of the next conver-
sion elapses. All 14 bits of CFG[13:0] must be written, or they
are ignored. In addition, if the 14-bit conversion result is not
read back before tDATA elapses, it is lost.
The SDO data is valid on both SCK edges. Although the rising
edge can be used to capture the data, a digital host using the
SCK falling edge allows a faster reading rate, provided it has an
acceptable hold time. After the 14th (or 28th) SCK falling edge, or
when CNV goes high (whichever occurs first), SDO returns to
high impedance.
If CFG readback is enabled, the CFG register associated with the
conversion result is read back MSB first following the LSB of the
conversion result. A total of 28 SCK falling edges is required to
return SDO to high impedance if this is enabled.
MISO
MOSI
SCK
SS
CNV
FOR SPI USE CPHA = 0, CPOL = 0.
SCK
SDO
DIN
AD7949
DIGITAL HOST
07351-
039
Figure 39. Connection Diagram for the AD7949 Without a Busy Indicator
相關PDF資料 |
PDF描述 |
|---|---|
| STD01W-H | WIRE & CABLE MARKERS |
| EVAL-AD7764EDZ | BOARD EVAL AD7764 |
| STD01W-U | WIRE & CABLE MARKERS |
| DK-DEV-1AGX60N | KIT DEV ARRIA GX 1AGX60N |
| GBM25DRSS | CONN EDGECARD 50POS DIP .156 SLD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7951EDZ | 功能描述:BOARD EVAL FOR AD7951 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:* 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7960FMCZ | 制造商:Analog Devices 功能描述:AD7960 18BIT PULSAR DIFF ADC 制造商:Analog Devices 功能描述:EVAL BOARD, AD7960 ADC, Silicon Manufacturer:Analog Devices, Silicon Core Number:AD7960, Kit Application Type:Data Converter, Application Sub Type:ADC, Kit Contents:Eval Board AD7960,, Features:(Not Applicable) |
| EVAL-AD7961FMCZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Boxed Product (Development Kits) 制造商:Analog Devices 功能描述:EVAL BOARD FOR AD7961 制造商:Analog Devices 功能描述:AD7961 16BIT PULSAR DIFF ADC 制造商:Analog Devices 功能描述:EVAL BOARD, AD7961 ADC, Silicon Manufacturer:Analog Devices, Silicon Core Number:AD7961, Kit Application Type:Data Converter, Application Sub Type:ADC, Kit Contents:Eval Board AD7961, Features:(Not Applicable) |
| EVAL-AD7980CBZ | 功能描述:BOARD EVAL CONTROL AD7980 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7980SDZ | 功能描述:BOARD EVAL FOR AD7980 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
發(fā)布緊急采購，3分鐘左右您將得到回復。