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參數(shù)資料
| 型號： | EVAL-AD7920CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7920 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | 0 ~ Vdd |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 12.5mW @ 250kSPS，5V |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7920 |
| 已供物品： | 板，CD |
| 相關(guān)產(chǎn)品： | AD7920BKSZ-500RL7TR-ND - IC ADC 12BIT SRL 250KSPS SC70-6 AD7920AKSZ-REEL7-ND - IC ADC 12BIT SRL 250KSPS SC70-6 AD7920AKSZ-500RL7TR-ND - IC ADC 12BIT SRL 250KSPS SC70-6 AD7920BRMZ-REEL7-ND - IC ADC 12BIT SRL 250KSPS 8MSOP AD7920BKSZ-REEL7-ND - IC ADC 12BIT SRL 250KSPS SC70-6 AD7920BKSZ-REEL-ND - IC ADC 12BIT SRL 250KSPS SC70-6 AD7920BRMZ-REEL-ND - IC ADC 12BIT SRL 250KSPS 8MSOP AD7920BRMZ-ND - IC ADC 12BIT 250KSPS 8-MSOP |
AD7910/AD7920
Rev. C | Page 9 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDD 1
GND
2
VIN 3
CS
6
SDATA
5
SCLK
4
AD7910/
AD7920
TOP VIEW
(Not to Scale)
02976-005
Figure 5. 6-Lead SC70 Pin Configuration
VDD 1
SDATA
2
CS
3
NC
4
VIN
8
GND
7
SCLK
6
NC
5
NC = NO CONNECT
AD7910/
AD7920
TOP VIEW
(Not to Scale)
02976-006
Figure 6. 8-Lead MSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
6-Lead
SC70
Pin No.
8-Lead
MSOP
Mnemonic
Description
6
3
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7910/AD7920 and framing the serial data transfer.
1
VDD
Power Supply Input. The VDD range for the AD7910/AD7920 is from 2.35 V to 5.25 V.
2
7
GND
Analog Ground. Ground reference point for all circuitry on the AD7910/AD7920. All analog input signals
should be referred to this GND voltage.
3
8
VIN
Analog Input. Single-ended analog input channel. The input range is 0 to VDD.
5
2
SDATA
Data Out. Logic output. The conversion result from the AD7910/AD7920 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from
the AD7920 consists of four leading zeros followed by the 12 bits of conversion data, which is provided
MSB first. The data stream from the AD7910 consists of four leading zeros followed by the 10 bits of
conversion data followed by two trailing zeros, which is also provided MSB first.
4
6
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input
is also used as the clock source for the AD7910/AD7920 conversion process.
N/A
4, 5
NC
No Connect.
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