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參數(shù)資料
| 型號(hào)： | EVAL-AD7484CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3MSPS, 14-Bit SAR ADC |
| 中文描述： | 3MSPS，14位SAR ADC |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大小： | 155K |
| 代理商： | EVAL-AD7484CB |
REV. PrC
7/13/01
Prelimnary Technical Data
PRELIMINARY TECHNICAL DATA
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
otherwise under any patent or patent rights of Analog Devices.
AD7484
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2001
3MSPS,
14-Bit SAR ADC
F UNC T IONAL BL OC K DIAGRAM
FEATURES
Fast Throughput Rate: 3Msps
Wide Input Bandwidth: 50MHz
No Pipeline Delays with SAR ADC
Excellent DC Accuracy Performance
Two Parallel Interface Modes
Low Power:
90mW (Full-Power) and 5mW (NAP Mode)
Standby Mode: 1μA max
Single +5V Supply Operation
Internal +2.5V Reference
Full-Scale Overrange Mode (using 15th bit)
System Offset Removal via User Access Offset Register
Nominal 0 to +2.5V Input with Shifted Range Capability
Pin Compatible Upgrade of 12-Bit AD7482
G E NE R A L D E SC R IP T ION
T he AD7484 is a 14-bit, high speed, low power, succes-
sive-approximation ADC. T he part features a parallel
interface with throughput rates up to 3Msps. T he part
contains a low-noise, wide bandwidth track/hold amplifier
which can handle input frequencies in excess of 50MHz.
T he conversion process is a proprietary algorithmic suc-
cessive-approximation technique which results in no
pipeline delays. T he input signal is sampled and a conver-
sion is initiated on the falling edge of the
signal. T he conversion process is controlled via an inter-
nally trimmed oscillator. Interfacing is via standard
parallel signal lines making the part directly compatible
with microcontrollers and DSPs.
T he AD7484 provides excellent ac and dc performance
specifications. Factory trimming ensures high dc accuracy
resulting in very low INL, offset and gain errors.
T he part uses advanced design techniques to achieve very
low power dissipation at high throughput rates. Power
consumption in normal mode of operation is 90mW.
T here are two power-saving modes: a NAP mode, which
keeps the reference circuitry alive for a quick power up
while consuming 5mW and a ST ANDBY mode which
reduces power consumption to a mere 5μW.
T he AD7484 features an on-board +2.5V reference but
the part can also accomodate an externally-provided
+2.5V reference source. T he nominal analog input range
is 0 to +2.5V but an offset shift capability allows this
nominal range to be offset by +/-200mV. T his allows the
user considerable flexibility in setting the bottom end
reference point of the signal range, a useful feature when
using single-supply op-amps.
T he AD7484 also provides the user with an 8% overrange
capability via a 15th bit. T hus, if the analog input range
strays outside the nominal by up to 8%, the user can still
accurately resolve the signal by using the 15th bit.
T he AD7484 is powered from a +4.75V to +5.25V sup-
ply. T he part also provides a V
DRIVE
pin which allows the
user to set the voltage levels for the digital interface lines.
T he range for this V
DRIVE
pin is from +2.7V to +5.25V.
T he part is housed in a 48-pin LQFP package and is
specified over a -40°C to +85°C temperature range.
2.5 V
REFERENCE
NAP
STBY
MODE2
CLIP
BUF
T/H
AVDD
AGND CBIASDVDD
DGND
VREF3
VREF1
VREF2
VIN
14-Bit Error
Correcting SAR
W
MODE1
D
D
D
VDRIVE
D
D
D14
D13
D12
D11
D10
D9
D8
D7
D
D
CONTROL
LOGIC AND I/O
REGISTERS
AD7484
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