參數(shù)資料
型號: EVAL-AD5570EBZ
廠商: Analog Devices Inc
文件頁數(shù): 10/24頁
文件大小: 0K
描述: BOARD EVALUATION FOR AD5570
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 83k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
設(shè)置時間: 12µs
DAC 型: 電壓
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: AD5570
AD5570
Rev. C | Page 18 of 24
Readback
The AD5570 allows the data contained in the DAC register to
be read back, if required. As with daisy chaining, an external
pull-up resistor of ~5 kΩ on SDO is required. The data in the
DAC register is available on SDO on the falling edges of SCLK
when SYNC is low. On the 16th SCLK edge, SDO is updated to
repeat SDIN with a delay of 16 clock cycles.
To read back the contents of the DAC register without writing
to the part, take SYNC low while LDAC is held high.
Daisy-chaining readback is also possible through the SDO pin
of the last device in the DAC chain because the DAC data passes
through the DAC chain with the appropriate latency.
68HC11*
MISO
SYNC
SDIN
SCLK
MOSI
SCK
PC7
PC6
LDAC
SDO
SYNC
SCLK
LDAC
SDO
SYNC
SCLK
LDAC
SDO
SDIN
*ADDITIONAL PINS OMITTED FOR CLARITY.
AD5570*
VLOGIC
R
03
76
0-
0
13
Figure 38. Daisy-Chaining Using the AD5570
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