AD5522
Data Sheet
Rev. E | Page 18 of 64
Pin No.
Mnemonic
Description
49
MEASVH3
DUT Voltage Sense Input (High Sense) for Channel 3.
52
MEASVH1
DUT Voltage Sense Input (High Sense) for Channel 1.
53
GUARDIN1/
DUTGND1
Guard Amplifier Input for Channel 1/DUTGND Input for Channel 1. This dual function pin is configured via the
serial interface. The default function at power-on is GUARDIN1. If this pin is configured as a DUTGND input for
the channel, the input to the guard amplifier is internally connected to MEASVH1. For more information, see
54
GUARD1
Guard Output Drive for Channel 1.
55
FOH1
Force Output for Internal Current Ranges (Channel 1).
56
EXTMEASIL1
Sense Input (Low Sense) for High Current Range (Channel 1).
57
EXTMEASIH1
Sense Input (High Sense) for High Current Range (Channel 1).
58
CCOMP1
59
CFF1
External Capacitor for Channel 1. This pin optimizes the stability and settling time performance of the force
amplifier when in force voltage mode. See the Compensation Capacitors section.
61
EXTFOH1
Force Output for High Current Range (Channel 1). Use an external resistor at this pin for current ranges up to
63
MEASOUT3
Multiplexed DUT Voltage, Current Sense Output, Temperature Sensor Voltage for Channel 3. This pin is
referenced to AGND.
64
MEASOUT2
Multiplexed DUT Voltage, Current Sense Output, Temperature Sensor Voltage for Channel 2. This pin is
referenced to AGND.
65
MEASOUT1
Multiplexed DUT Voltage, Current Sense Output, Temperature Sensor Voltage for Channel 1. This pin is
referenced to AGND.
66
MEASOUT0
Multiplexed DUT Voltage, Current Sense Output, Temperature Sensor Voltage for Channel 0. This pin is
referenced to AGND.
68
SYS_FORCE
External Force Signal Input. This pin enables the connection of the system PMU.
70
SYS_SENSE
External Sense Signal Output. This pin enables the connection of the system PMU.
71
REFGND
Accurate Analog Reference Input Ground.
72
VREF
Reference Input for DAC Channels (5 V for specified performance).
73
DUTGND
DUT Voltage Sense Input (Low Sense). By default, this input is shared among all four PMU channels. If a DUTGND
input is required for each channel, the user can configure the GUARDINx/DUTGNDx pins as DUTGND inputs for
each PMU channel.
75
SPI/LVDS
Interface Select Pin. Logic low selects SPI-compatible interface mode; logic high selects LVDS interface mode.
This pin has a pull-down current source (~350 μA). In LVDS interface mode, the CPOHx and CPOLx pins default
to differential interface pins.
76
CGALM
Open-Drain Output for Guard and Clamp Alarms. This open-drain pin provides shared alarm information
about the guard amplifier and clamp circuitry. By default, this output pin is disabled. The system control
register allows the user to enable this function and to set the open-drain output as a latched output. The user
can also choose to enable alarms for the guard amplifier, the clamp circuitry, or both. When this pin flags an
alarm, the origins of the alarm can be determined by reading back the alarm status register. Two flags per
channel in this word (one latched, one unlatched) indicate which function caused the alarm and whether the
alarm is still present.
77
TMPALM
Open-Drain Output for Temperature Alarm. This latched, active low, open-drain output flags a temperature
alarm to indicate that the junction temperature has exceeded the default temperature setting (130°C) or the
user programmed temperature setting. Two flags in the alarm status register (one latched, one unlatched)
indicate whether the temperature has dropped below 130°C or remains above 130°C. User action is required
to clear this latched alarm flag by writing to the clear bit (Bit 6) in any of the PMU registers.
78
RESET
Digital Reset Input. This active low, level sensitive input resets all internal nodes on the device to their power-
on reset values.
80
EXTFOH0
Force Output for High Current Range (Channel 0). Use an external resistor at this pin for current ranges up to