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參數(shù)資料
| 型號： | EVAL-AD5443EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CAP X7R 470PF 50V 10% 0603 |
| 中文描述： | 8-/10-/12-Bit高帶寬倍增DAC的串行接口 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 553K |
| 代理商： | EVAL-AD5443EB |
REV. 0
–16–
AD5426/AD5432/AD5443
DAC leakage current is also a potential error source in divider
circuits. The leakage current must be counterbalanced by an
opposite current supplied from the op amp through the DAC.
Since only a fraction D of the current into the V
REF
terminal is
routed to the I
OUT
1 terminal, the output voltage has to change
as follows:
Output Error Voltage Due to DAC Leakage
= (Leakage R)/D
where
R
is the DAC resistance at the V
REF
terminal. For a DAC
leakage current of 10 nA, R = 10 k
and a gain (i.e., 1/D) of 16
the error voltage is 1.6 mV.
REFERENCE SELECTION
When selecting a reference for use with the AD5426 series of
current output DACs, pay attention to the references output
voltage temperature coefficient specification. This parameter not
only affects the full-scale error, but can also affect the linearity
(INL and DNL) performance. The reference temperature coeffi-
cient should be consistent with the system accuracy specifications.
For example, an 8-bit system required to hold its overall specifi-
cation to within 1 LSB over the temperature range 0
°
C to 50
°
C
dictates that the maximum
system drift
with temperature should be
less than 78 ppm/
°
C. A 12-bit system with the same temperature
range to overall specification within 2 LSBs requires a maximum
drift of 10 ppm/
°
C. By choosing a precision reference with low
output temperature coefficient, this error source can be minimized.
Table IV suggests some references available from Analog Devices
that are suitable for use with this range of current output DACs.
AMPLIFIER SELECTION
The primary requirement for the current-steering mode is an
amplifier with low input bias currents and low input offset volt-
age. The input offset voltage of an op amp is multiplied by the
variable gain (due to the code dependent output resistance of
the DAC) of the circuit. A change in this noise gain between
two adjacent digital fractions produces a step change in the
output voltage due to the amplifier’s input offset voltage. This
output voltage change is superimposed on the desired change in
output between the two codes and gives rise to a differential
linearity error, which, if large enough, could cause the DAC to
be nonmonotonic. In general, the input offset voltage should be
a fraction (~ <1/4) of an LSB to ensure monotonic behavior
when stepping through codes.
The input bias current of an op amp also generates an offset at
the voltage output as a result of the bias current flowing in the
feedback resistor R
FB
. Most op amps have input bias currents low
enough to prevent any significant errors in 12-bit applications.
Common-mode rejection of the op amp is important in voltage
switching circuits since it produces a code dependent error at
the voltage output of the circuit. Most op amps have adequate
common-mode rejection for use at 8-, 10-, and 12-bit resolution.
Provided the DAC switches are driven from true wideband low
impedance sources (V
IN
and AGND), they settle quickly. Conse-
quently, the slew rate and settling time of a voltage switching DAC
circuit is determined largely by the output op amp. To obtain
minimum settling time in this configuration, it is important to
minimize capacitance at the V
REF
node (voltage output node in
this application) of the DAC. This is done by using low inputs
capacitance buffer amplifiers and careful board design.
Table IV. Suitable ADI Precision References Recommended for Use with AD5426/AD5432/AD5443 DACs
Part No.
Output Voltage
Initial Tolerance
Temperature Drift
3 ppm/
°
C
3 ppm/
°
C
3 ppm/
°
C
3 ppm/
°
C
0.1 Hz to 10 Hz Noise
Package
ADR01
ADR02
ADR03
ADR425
10 V
5 V
2.5 V
5 V
0.1%
0.1%
0.2%
0.04%
20 V p-p
10 V p-p
10 V p-p
3.4 V p-p
SC70, TSOT, SOIC
SC70, TSOT, SOIC
SC70, TSOT, SOIC
MSOP, SOIC
Table V. Some Precision ADI Op Amps Suitable for Use with AD5426/AD5432/AD5443 DACs
Part No.
Max Supply Voltage (V)
±
20
±
18
+6
V
OS
(max) ( V)
25
60
5
I
B
(max) (nA)
0.1
2
0.05
GBP (MHz)
Slew Rate (V/ s)
OP97
OP1177
AD8551
0.9
1.3
1.5
0.2
0.7
0.4
Table VI. Listing of Some High Speed ADI Op Amps Suitable for Use with AD5426/AD5432/AD5443 DACs
Max Supply Voltage
(V)
±
12
±
12
±
5
±
5
BW @ A
CL
(MHz)
Slew Rate
(V/ s)
V
OS
(max)
( V)
I
B
(max)
(nA)
Part No.
AD8065
AD8021
AD8038
AD9631
145
200
350
320
180
100
425
1300
1500
1000
3000
10000
0.01
1000
0.75
7000
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD5443EBZ | 功能描述:BOARD EVAL FOR AD5433 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5443SDZ | 功能描述:BOARD EVAL FOR AD5443 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉換器 (DAC) 系列:* 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5444EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-AD5444EBZ | 制造商:Analog Devices 功能描述:EVAL KIT FOR 12-/14BIT HIGH BANDWIDTH MULTIPLYING DACS W/ SE - Bulk |
| EVAL-AD5445EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Bulk |
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