參數(shù)資料
型號(hào): EVAL-AD5382EB
廠商: Analog Devices, Inc.
英文描述: 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
中文描述: 32通道,3伏/ 5 V,單電源,14位,電壓輸出DAC
文件頁(yè)數(shù): 4/40頁(yè)
文件大小: 616K
代理商: EVAL-AD5382EB
AD5382
SPECIFICATIONS
AD5382-5 SPECIFICATIONS
Table 3. AV
DD
= 4.5 V to 5.5 V; DV
DD
= 2.7 V to 5.5 V, AGND = DGND = 0 V;
External REFIN = 2.5 V; all specifications T
MIN
to T
MAX
, unless otherwise noted
Parameter
ACCURACY
Resolution
Relative Accuracy
2
(INL)
Differential Nonlinearity (DNL)
Zero-Scale Error
Offset Error
Offset Error TC
Gain Error
Gain Temperature Coefficient
3
DC Crosstalk
3
REFERENCE INPUT/OUTPUT
Reference Input
3
Reference Input Voltage
DC Input Impedance
Input Current
Reference Range
Reference Output
4
Rev. 0 | Page 4 of 40
AD5382-5
1
14
±4
–1/+2
4
±4
±5
±0.024
±0.06
2
0.5
2.5
1
±1
1 to V
DD
/2
Unit
Bits
LSB max
LSB max
mV max
mV max
μV/°C typ
% FSR max
% FSR max
ppm FSR/°C typ
LSB max
V
M min
μA max
V min/max
Test Conditions/Comments
Guaranteed monotonic over temperature
Measured at Code 32 in the linear region
At 25°C
T
MIN
to T
MAX
±1% for specified performance, AVdd=2xREFIN+50mV
Typically 100 M
Typically ±30 nA
Enabled via CR10 in the AD5382 control register.
CR12 selects the reference voltage.
At ambient. CR12 = 1. Optimized for 2.5 V operation.
1.25 V reference selected. CR12 = 0
Temperature Range : +25°C to +85°C
Temperature Range : –40°C to +85°C
DV
DD
= 2.7 V to 5.5 V
Total for all pins. T
A
= T
MIN
to T
MAX
SMBus compatible at DV
DD
< 3.6 V
SMBus compatible at DV
DD
< 3.6 V
Input filtering suppresses noise spikes of less than 50 ns
Output Voltage
2.495/2.505
1.22/1.28
±10
±15
0/AV
DD
40
±1
200
1000
0.5
500
100
2
0.8
±10
10
0.7 DV
DD
0.3 DV
DD
±1
0.05 DV
DD
8
50
V min/max
V min/max
ppm/°C max
ppm/°C max
V min/max
mA max
mA max
pF max
pF max
max
typ
nA typ
V min
V max
μA max
pF max
V min
V max
μA max
V min
pF typ
ns max
Reference TC
OUTPUT CHARACTERISTICS
3
Output Voltage Range
2
Short-Circuit Current
Load Current
Capacitive Load Stability
R
L
= ∞
R
L
= 5 k
DC Output Impedance
MONITOR PIN
Output Impedance
Three-State Leakage Current
LOGIC INPUTS (EXCEPT SDA/SCL)
3
V
IH
, Input High Voltage
V
IL
, Input Low Voltage
Input Current
Pin Capacitance
LOGIC INPUTS (SDA, SCL ONLY)
V
IH
, Input High Voltage
V
IL
, Input Low Voltage
I
IN
, Input Leakage Current
V
HYST
, Input Hysteresis
C
IN
, Input Capacitance
Glitch Rejection
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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