參數(shù)資料
型號(hào)： EVAL-AD5381EB
廠商： Analog Devices, Inc.
英文描述： 40-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
中文描述： 40通道，3伏/ 5 V，單電源，12位，電壓輸出DAC
文件頁(yè)數(shù)： 8/36頁(yè)
文件大小： 1200K
代理商： EVAL-AD5381EB
AD5381
TIMING CHARACTERISTICS
SERIAL INTERFACE TIMING
Table 6. DV
DD
= 2.7 V to 5.5 V; AV
DD
= 4.5 V to 5.5 V or 2.7 V to 3.6 V; AGND = DGND = 0 V; all specifications
T
MIN
to T
MAX
, unless otherwise noted
Parameter
1
,
2
,
3
Limit at T
MIN
, T
MAX
Unit
t
1
33
ns min
t
2
13
ns min
t
3
13
ns min
t
4
13
ns min
t
5
4
13
ns min
t
6
4
33
ns min
t
7
10
ns min
t
7A
50
ns min
t
8
5
ns min
t
9
4.5
ns min
t
104
30
ns max
t
11
670
ns max
t
124
20
ns min
t
13
20
ns min
t
14
100
ns max
t
15
0
ns min
t
16
100
ns min
t
17
8
μs typ
t
18
20
ns min
t
19
12
μs max
t
205
20
ns max
t
215
5
ns min
t
225
8
ns min
t
23
20
ns min
Rev. A | Page 8 of 36
Description
SCLK cycle time
SCLK high time
SCLK low time
SYNC falling edge to SCLK falling edge setup time
24
th
SCLK falling edge to SYNC falling edge
Minimum SYNC low time
Minimum SYNC high time
Minimum SYNC high time in Readback mode
Data setup time
Data hold time
24
th
SCLK falling edge to BUSY falling edge
BUSY pulse width low (single channel update)
24th SCLK falling edge to LDAC falling edge
LDAC pulse width low
BUSY rising edge to DAC output response time
BUSY rising edge to LDAC falling edge
LDAC falling edge to DAC output response time
DAC output settling time
CLR pulse width low
CLR pulse activation time
SCLK rising edge to SDO valid
SCLK falling edge to SYNC rising edge
SYNC rising edge to SCLK rising edge
SYNC rising edge to LDAC falling edge
1
Guaranteed by design and characterization, not production tested.
2
All input signals are specified with t
r
= t
f
= 5 ns (10% to 90% of V
CC
) and are timed from a voltage level of 1.2 V.
3
See
Figur
,
, and
.
Figure 2,
e 3 Figure 4
Figure 5
4
Standalone mode only.
5
Daisy-chain mode only.
C
50pF
TO OUTPUT PIN
V
OH
(MIN) OR
V
OL
(MAX)
200
μ
A
200
μ
A
I
OL
I
OH
0
Figure 2. Load Circuit for Digital Output Timing
相關(guān)PDF資料
PDF描述
EVAL-AD5382EB 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
EVAL-AD5383EB 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
EVAL-AD5398EB 120 mA, Current Sinking, 10-Bit, I2C DAC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-AD5382EB 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk 制造商:Rochester Electronics LLC 功能描述:
EVAL-AD5382EBZ 功能描述:BOARD EVAL FOR AD5382 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5383EB 制造商:Analog Devices 功能描述:EVAL KIT FOR 32CH, 3V/5 V, SGL-SUPPLY, 12-BIT, VOLT OUTPUT D - Bulk 制造商:Rochester Electronics LLC 功能描述:
EVAL-AD5390EB 制造商:Analog Devices 功能描述:
EVAL-AD5390EBZ 功能描述:BOARD EVALUATION FOR AD5390 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
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