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參數(shù)資料
| 型號(hào)： | EPSA23BBJP-60.000MTR |
| 廠商： | ECLIPTEK CORP |
| 元件分類(lèi)： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 60 MHz, LVCMOS OUTPUT |
| 封裝： | ROHS COMPLIANT, CERAMIC, SMD, 4 PIN |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大?。?/td> | 196K |
| 代理商： | EPSA23BBJP-60.000MTR |
EPSA23BBJP-60.000M TR
OUTPUT DISABLE
(HIGH IMPEDANCE
STATE)
OUTPUT WAVEFORM & TIMING DIAGRAM
VOH
VOL
90% of Waveform
50% of Waveform
10% of Waveform
Fall
Time
Rise
Time
TW
T
Duty Cycle (%) = TW/T x 100
VIH
VIL
tPLZ
tPZL
CLOCK
OUTPUT
TRI-ST
A
TE
INPUT
Supply
Voltage
(VDD)
Test Circuit for CMOS Output
Output
Tri-State or
Power Down
Ground
+
_
Power
Supply
0.01F
(Note 1)
0.1F
(Note 1)
CL
(Note 3)
Note 1: An external 0.01F ceramic bypass capacitor in parallel with a 0.1F high frequency ceramic bypass
capacitor close (less than 2mm) to the package ground and supply voltage pin is required.
Note 2: A low input capacitance (<12pF), 10X Attentuation Factor, High Impedance (>10Mohms), and
High bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value CL includes sum of all probe and fixture capacitance. See applicable specification sheet
for ‘Load Drive Capability’.
Voltage
Meter
Current
Meter
Oscilloscope
Frequency
Counter
Probe
(Note 2)
www.ecliptek.com | Specification Subject to Change Without Notice | Rev A 3/13/2011 | Page 3 of 6
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