參數(shù)資料
型號: EPM9320LC84-15
廠商: Altera
文件頁數(shù): 1/46頁
文件大?。?/td> 0K
描述: IC MAX 9000 CPLD 320 84-PLCC
標準包裝: 75
系列: Max® 9000
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 15.0ns
電壓電源 - 內(nèi)部: 4.75 V ~ 5.25 V
邏輯元件/邏輯塊數(shù)目: 20
宏單元數(shù): 320
門數(shù): 6000
輸入/輸出數(shù): 60
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 84-LCC(J 形引線)
供應商設備封裝: 84-PLCC(29.31x29.31)
包裝: 管件
產(chǎn)品目錄頁面: 604 (CN2011-ZH PDF)
其它名稱: 544-2362-5
Altera Corporation
1
MAX 9000
Programmable Logic
Device Family
June 2003, ver. 6.5
Data Sheet
DS-M9000-6.5
Includes
MAX 9000A
Features...
High-performance CMOS EEPROM-based programmable logic
devices (PLDs) built on third-generation Multiple Array MatriX
(MAX) architecture
5.0-V in-system programmability (ISP) through built-in IEEE Std.
1149.1 Joint Test Action Group (JTAG) interface
Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE
Std. 1149.1-1990
High-density erasable programmable logic device (EPLD) family
ranging from 6,000 to 12,000 usable gates (see Table 1)
10-ns pin-to-pin logic delays with counter frequencies of up to
144 MHz
Fully compliant with the peripheral component interconnect Special
Interest Group’s (PCI SIG) PCI Local Bus Specification, Revision 2.2
Dual-output macrocell for independent use of combinatorial and
registered logic
FastTrack Interconnect for fast, predictable interconnect delays
Input/output registers with clear and clock enable on all I/O pins
Programmable output slew-rate control to reduce switching noise
MultiVolt I/O interface operation, allowing devices to interface with
3.3-V and 5.0-V devices
Configurable expander product-term distribution allowing up to 32
product terms per macrocell
Programmable power-saving mode for more than 50% power
reduction in each macrocell
Table 1. MAX 9000 Device Features
Feature
EPM9320
EPM9320A
EPM9400
EPM9480
EPM9560
EPM9560A
Usable gates
6,000
8,000
10,000
12,000
Flipflops
484
580
676
772
Macrocells
320
400
480
560
Logic array blocks (LABs)
20
25
30
35
Maximum user I/O pins
168
159
175
216
tPD1 (ns)
10
15
10
tFSU (ns)
3.0
5
3.0
tFCO (ns)
4.5
7
4.8
fCNT (MHz)
144
118
144
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相關代理商/技術參數(shù)
參數(shù)描述
EPM9320LC84-20 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 9000 320 Macro 60 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM9320LI84-15 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
EPM9320LI84-20 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 9000 320 Macro 60 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM9320RC208-15 制造商:Altera Corporation 功能描述:IC CPLD 320MC 15NS 208RQFP 制造商:Altera Corporation 功能描述:IC MAX 208RQFP
EPM9320RC208-20 制造商:Altera Corporation 功能描述:IC CPLD 320MC 20NS 208RQFP 制造商:Altera Corporation 功能描述:IC MAX 208RQFP