參數(shù)資料
型號(hào)： EPM7160SLC84-7
廠商： Altera Corporation
英文描述： Programmable Logic Device Family
中文描述： 可編程邏輯器件系列
文件頁(yè)數(shù)： 2/62頁(yè)
文件大?。?/td> 1173K
代理商： EPM7160SLC84-7
2
Altera Corporation
MAX 7000 Programmable Logic Device Family Data Sheet
...and More
Features
■
■
Open-drain output option in MAX 7000S devices
Programmable macrocell flipflops with individual clear, preset,
clock, and clock enable controls
Programmable power-saving mode for a reduction of over 50
%
in
each macrocell
Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
44 to 208 pins available in plastic J-lead chip carrier (PLCC), ceramic
pin-grid array (PGA), plastic quad flat pack (PQFP), power quad flat
pack (RQFP), and 1.0-mm thin quad flat pack (TQFP) packages
Programmable security bit for protection of proprietary designs
3.3-V or 5.0-V operation
–
MultiVolt
TM
I/ O interface operation, allowing devices to
interface with 3.3-V or 5.0-V devices (MultiVolt I/ O operation is
not available in 44-pin packages)
–
Pin compatible with low-voltage MAX 7000A and MAX 7000B
devices
Enhanced features available in MAX 7000E and MAX 7000S devices
–
Six pin- or logic-driven output enable signals
–
Two global clock signals with optional inversion
–
Enhanced interconnect resources for improved routability
–
Fast input setup times provided by a dedicated path from I/ O
pin to macrocell registers
–
Programmable output slew-rate control
Software design support and automatic place-and-route provided by
Altera’s development system for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/ 800 workstations
■
■
■
■
■
■
■
Table 2. MAX 7000S Device Features
Feature
EPM7032S
EPM7064S
EPM7128S
EPM7160S
EPM7192S
EPM7256S
Usable gates
Macrocells
Logic array
blocks
Maximum
user I/O pins
t
PD
(ns)
t
SU
(ns)
t
FSU
(ns)
t
CO1
(ns)
f
CNT
(MHz)
600
32
2
1,250
64
4
2,500
128
8
3,200
160
10
3,750
192
12
5,000
256
16
36
68
100
104
124
164
5
5
6
6
7.5
4.1
3
4.7
125.0
7.5
3.9
3
4.7
128.2
2.9
2.5
3.2
175.4
2.9
2.5
3.2
175.4
3.4
2.5
4
147.1
3.4
2.5
3.9
149.3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7160SLI84-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 160 Macro 64 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7160SQC160-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 160 Macro 104 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7160SQC160-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 160 Macro 104 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7160SQC160-15 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture
EPM7160SQC1606 制造商:Altera Corporation 功能描述:
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