參數(shù)資料
型號(hào)： EPM7064BFC100-3
廠商： ALTERA CORP
元件分類(lèi)： PLD
英文描述： EE PLD, 3.5 ns, PBGA100
封裝： FBGA-100
文件頁(yè)數(shù)： 12/66頁(yè)
文件大?。?/td> 962K
代理商： EPM7064BFC100-3
2
Altera Corporation
MAX 7000B Programmable Logic Device Data Sheet
...and More
Features
■
System-level features
–MultiVoltTM I/O interface enabling device core to run at 2.5 V,
while I/O pins are compatible with 3.3-V, 2.5-V, and 1.8-V logic
levels
–
Programmable power-saving mode for 50% or greater power
reduction in each macrocell
–
Fast input setup times provided by a dedicated path from I/O
pin to macrocell registers
–
Support for advanced I/O standards, including SSTL-2 and
SSTL-3, and GTL+
–
Bus-hold option on I/O pins
–PCI compatible
–
Bus-friendly architecture including programmable slew-rate
control
–
Open-drain output option
–
Programmable security bit for protection of proprietary designs
–
Built-in boundary-scan test circuitry compliant with
IEEE Std. 1149.1
–
Supports hot-socketing operation
–
Programmable ground pins
■
Advanced architecture features
–
Programmable interconnect array (PIA) continuous routing
structure for fast, predictable performance
–
Configurable expander product-term distribution, allowing up
to 32 product terms per macrocell
–
Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
–
Two global clock signals with optional inversion
–
Programmable power-up states for macrocell registers
–
6 to 10 pin- or logic-driven output enable signals
■
Advanced package options
–
Pin counts ranging from 44 to 256 in a variety of thin quad flat
pack (TQFP), plastic quad flat pack (PQFP), ball-grid array
(BGA), space-saving FineLine BGATM, 0.8-mm Ultra
FineLine BGA, and plastic J-lead chip carrier (PLCC) packages
–
Pin-compatibility with other MAX 7000B devices in the same
package
■
Advanced software support
–
Software design support and automatic place-and-route
provided by Altera’s MAX+PLUS II development system for
Windows-based PCs and Sun SPARCstation, and HP 9000
Series 700/800 workstations
相關(guān)PDF資料
PDF描述
EPM7064BFC100-5 EE PLD, 3.5 ns, PBGA100
EPM7064BFC100-7 EE PLD, 3.5 ns, PBGA100
EPM7064BTC100-3 EE PLD, 3.5 ns, PQFP100
EPM7064BTC100-5 EE PLD, 3.5 ns, PQFP100
EPM7064BTC100-7 EE PLD, 3.5 ns, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7064BFC100-3N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7064BFC100-5 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7064BFC100-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7064BLC44-3 制造商:Rochester Electronics LLC 功能描述:- Bulk
EPM7064BLC44-5 制造商:Rochester Electronics LLC 功能描述:- Bulk
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