參數(shù)資料
型號(hào)： EPM7032AE
廠商： Altera Corporation
英文描述： Programmable Logic Device
中文描述： 可編程邏輯器件
文件頁(yè)數(shù)： 21/60頁(yè)
文件大?。?/td> 943K
代理商： EPM7032AE
Altera Corporation
21
MAX 7000A Programmable Logic Device Data Sheet
Programmable
Speed/Power
Control
MAX 7000A devices offer a power-saving mode that supports low-power
operation across user-defined signal paths or the entire device. This
feature allows total power dissipation to be reduced by 50
%
or more
because most logic applications require only a small fraction of all gates to
operate at maximum frequency.
The designer can program each individual macrocell in a MAX 7000A
device for either high-speed (i.e., with the Turbo Bit
TM
option turned on)
or low-power operation (i.e., with the Turbo Bit option turned off). As a
result, speed-critical paths in the design can run at high speed, while the
remaining paths can operate at reduced power. Macrocells that run at low
power incur a nominal timing delay adder (
t
LPA
) for the
t
LAD
,
t
LAC
,
t
IC
,
t
EN
,
t
SEXP
,
t
ACL
, and
t
CPPW
parameters.
Output
Configuration
MAX 7000A device outputs can be programmed to meet a variety of
system-level requirements.
MultiVolt I/O Interface
The MAX 7000A device architecture supports the MultiVolt I/O interface
feature, which allows MAX 7000A devices to connect to systems with
differing supply voltages. MAX 7000A devices in all packages can be set
for 2.5-V, 3.3-V, or 5.0-V I/O pin operation. These devices have one set of
VCC
pins for internal operation and input buffers (
VCCINT
), and another
set for I/O output drivers (
VCCIO
).
The
VCCIO
pins can be connected to either a 3.3-V or 2.5-V power supply,
depending on the output requirements. When the
VCCIO
pins are
connected to a 2.5-V power supply, the output levels are compatible with
2.5-V systems. When the
VCCIO
pins are connected to a 3.3-V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0-V systems. Devices operating with V
CCIO
levels lower than 3.0 V
incur a slightly greater timing delay of
t
OD2
instead of
t
OD1
. Inputs can
always be driven by 2.5-V, 3.3-V, or 5.0-V signals.
Table 9
describes the MAX 7000A MultiVolt I/O support.
Table 9. MAX 7000A MultiVolt I/O Support
V
CCIO
Voltage
Input Signal (V)
Output Signal (V)
2.5
3.3
5.0
2.5
3.3
5.0
2.5
v
v
v
v
3.3
v
v
v
v
v
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7032AELC44-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7032AELC44-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7032AELC444 制造商:ALTERA 功能描述:New
EPM7032AELC44-4 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7032AELC44-4N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 32 Macro 36 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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