參數(shù)資料
型號(hào)： EPM3256A
廠商： Altera Corporation
英文描述： Programmable Logic Device Family
中文描述： 可編程邏輯器件系列
文件頁(yè)數(shù)： 12/42頁(yè)
文件大小： 649K
代理商： EPM3256A
12
Altera Corporation
MAX 3000A Programmable Logic Device Family Data Sheet
In–System
Programma-
bility
MAX 3000A devices can be programmed in–system via an industry–
standard four–pin IEEE Std. 1149.1-1990 (JTAG) interface. In-system
programmability (ISP) offers quick, efficient iterations during design
development and debugging cycles. The MAX 3000A architecture
internally generates the high programming voltages required to program
its EEPROM cells, allowing in–system programming with only a single
3.3–V power supply. During in–system programming, the I/ O pins are
tri–stated and weakly pulled–up to eliminate board conflicts. The pull–up
value is nominally 50 k
.
MAX 3000A devices have an enhanced ISP algorithm for faster
programming. These devices also offer an
ISP_Done
bit that ensures safe
operation when in–system programming is interrupted. This
ISP_Done
bit, which is the last bit programmed, prevents all I/ O pins from driving
until the bit is programmed.
ISP simplifies the manufacturing flow by allowing devices to be mounted
on a printed circuit board (PCB) with standard pick–and–place equipment
before they are programmed. MAX 3000A devices can be programmed by
downloading the information via in–circuit testers, embedded processors,
the MasterBlaster communications cable, the ByteBlasterMV parallel port
download cable, and the BitBlaster serial download cable. Programming
the devices after they are placed on the board eliminates lead damage on
high–pin–count packages (e.g., QFP packages) due to device handling.
MAX 3000A devices can be reprogrammed after a system has already
shipped to the field. For example, product upgrades can be performed in
the field via software or modem.
The Jam STAPL programming and test language can be used to program
MAX 3000A devices with in–circuit testers, PCs, or embedded processors.
f
For more information on using the Jam STAPL programming and test
Application Note 88 (Using the Jam Language for ISP & ICR via
,
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM3256AFC256-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 256 Macro 161 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3256AFC256-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 256 Macro 161 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3256AFI256-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 256 Macro 161 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3256AQC208-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 256 Macro 161 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3256AQC208-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 256 Macro 161 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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