參數(shù)資料
型號: EPF81500AQC240-2
廠商: Altera
文件頁數(shù): 16/62頁
文件大?。?/td> 0K
描述: IC FLEX 8000A FPGA 16K 240-PQFP
產品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 48
系列: FLEX 8000
LAB/CLB數(shù): 162
邏輯元件/單元數(shù): 1296
輸入/輸出數(shù): 181
門數(shù): 16000
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP
供應商設備封裝: 240-PQFP(32x32)
其它名稱: 544-2249
Altera Corporation
23
FLEX 8000 Programmable Logic Device Family Data Sheet
FL
EX
800
0
3
Table 5 lists the source of the peripheral control signal for each FLEX 8000
device by row.
Output
Configuration
This section discusses slew-rate control and MultiVolt I/O interface
operation for FLEX 8000 devices.
Slew-Rate Control
The output buffer in each IOE has an adjustable output slew rate that can
be configured for low-noise or high-speed performance. A slow slew rate
reduces system noise by slowing signal transitions, adding a maximum
delay of 3.5 ns. The slow slew-rate setting affects only the falling edge of
a signal. The fast slew rate should be used for speed-critical outputs in
systems that are adequately protected against noise. Designers can specify
the slew rate on a pin-by-pin basis during design entry or assign a default
slew rate to all pins on a global basis.
f For more information on high-speed system design, go to Application
Table 5. Row Sources of FLEX 8000 Peripheral Control Signals
Peripheral
Control Signal
EPF8282A
EPF8282AV
EPF8452A
EPF8636A
EPF8820A
EPF81188A
EPF81500A
CLK0
Row A
Row E
CLK1/OE1
Row B
Row C
Row B
CLR0
Row A
Row B
Row F
CLR1/OE0
Row B
Row C
Row D
Row C
OE2
Row A
Row D
Row A
OE3
Row B
Row A
OE4
–––––
Row B
OE5
–––––
Row C
OE6
–––––
Row D
OE7
–––––
Row D
OE8
–––––
Row E
OE9
–––––
Row F
相關PDF資料
PDF描述
EPM2210GF324C3 IC MAX II CPLD 2210 LE 324-FBGA
EPM3512AFI256-10N IC MAX 3000A CPLD 512 256-FBGA
EPM7256SRC208-7N IC MAX 7000 CPLD 256 208-RQFP
EPM7512AEFC256-7 IC MAX 7000 CPLD 512 256-FBGA
EPM7512BFC256-5 IC MAX 7000 CPLD 512 256-FBGA
相關代理商/技術參數(shù)
參數(shù)描述
EPF81500AQC240-2N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500AQC240-4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 8000 162 LABs 181 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF81500ARC2402 制造商:ALTERA 功能描述:*