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參數(shù)資料
| 型號： | EPF8049SM |
| 廠商： | PCA Electronics Inc. |
| 英文描述： | 10/100 Base-X Module for ICS 1890 & SSI 78Q2120 Multi-Port Applications |
| 中文描述： | 個10/100 Base - X的ICS的1890模塊 |
| 文件頁數(shù)： | 2/2頁 |
| 文件大?。?/td> | 145K |
| 代理商： | EPF8049SM |
CSF8049SMb Rev. - 5/15/98
10/100 Base-X Module for
ICS 1890 & SSI 78Q2120
Multi-Port Applications
EPF8049SM
E L E C T R O N I C S I N C .
The circuit below is a guideline for interconnecting PCA’s EPF8049SM with ICS 1890 chip for 10/100 Mb/s applications.
Further details can be obtained from the chip manufacturer application notes. Connection to the alternative chip
SSI 78Q2120 is straight forward; please consult the SSI data sheet recommendations for completing this project.
Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded
signals in 10/100 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust
the chips supporting resistor to get at least 2.12V pk-pk across the transmit pins.
Primary side center tap can be returned to the chip side ground plane; but more often than not, if the ground plane is itself
noisy, field experience has shown that it may worsen EMI situation. It is perhaps wiser to carefully lay the system borad
so that substantial gain in EMI suppression is obtained from the so called “common mode termination” on the cable side as
shown below. In any event, this configuration has been known to be quite successful in the field in EMI containment for
similar applications.
The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires
pick up from the immediate environment. Their placement and use are to be considered carefully before a design is
finalized.
It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit
the plane off at least 0.05 inches away from the chip side pins of EPF8049SM. There need not be any ground plane beyond
this plane.
For best results, PCB designer should design the outgoing traces preferably to be 50
, balanced and well coupled to
achieve minimum radiation from these traces.
Typical Application Circuit for UTP (only one port shown)
Notes : Only one port shown for Hub side connection.
ICS
1890
RJ45*
1
2
6
3
4
5
7
8
TX+
TX-
RX+
RX-
Chassis
Ground
50
50
75
EPF8049SM
5
High Voltage
Capacitor
5
5
5
CM Capacitor
5Vcc
3
5
1
2
40
36
37
39
38
Rcv
Xmit
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
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