參數(shù)資料
型號(hào): EPF6024AQC208-1
廠商: ALTERA CORP
元件分類(lèi): PLD
英文描述: LOADABLE PLD, PQFP208
封裝: PLASTIC, QFP-208
文件頁(yè)數(shù): 26/57頁(yè)
文件大?。?/td> 508K
代理商: EPF6024AQC208-1
32
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 7.0 V for
input currents less than 100 mA and periods shorter than 20 ns.
(3)
Numbers in parentheses are for industrial-temperature-range devices.
(4)
Maximum VCC rise time to 100 ms. VCC must rise monotonically.
(5)
Typical values are for TA = 25° C and VCC = 5.0 V.
(6)
These values are specified under the FLEX 6000 Recommended Operating Conditions shown in Table 12 on
(7)
The IOH parameter refers to high-level TTL or CMOS output current.
(8)
The IOL parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
as well as output pins.
(9)
Capacitance is sample-tested only.
Table 13. FLEX 6000 5.0-V Device DC Operating Conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIH
High-level input voltage
2.0
VCCINT + 0.5
V
VIL
Low-level input voltage
–0.5
0.8
V
VOH
5.0-V high-level TTL output
voltage
IOH = –8 mA DC, VCCIO = 4.75 V (7)
2.4
V
3.3-V high-level TTL output
voltage
IOH = –8 mA DC, VCCIO = 3.00 V (7)
2.4
V
3.3-V high-level CMOS output
voltage
IOH = –0.1 mA DC, VCCIO = 3.00 V (7)
VCCIO –0.2
V
VOL
5.0-V low-level TTL output
voltage
IOL = 8 mA DC, VCCIO = 4.75 V (8)
0.45
V
3.3-V low-level TTL output
voltage
IOL = 8 mA DC, VCCIO = 3.00 V (8)
0.45
V
3.3-V low-level CMOS output
voltage
IOL = 0.1 mA DC, VCCIO = 3.00 V (8)
0.2
V
II
Input pin leakage current
VI = VCC or ground (8)
–10
10
A
IOZ
Tri-stated I/O pin leakage current VO = VCC or ground (8)
–40
40
A
ICC0
VCC supply current (standby)
VI = ground, no load
0.5
5
mA
Table 14. FLEX 6000 5.0-V Device Capacitance
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input capacitance for I/O pin
VIN = 0 V, f = 1.0 MHz
8pF
CINCLK
Input capacitance for dedicated input VIN = 0 V, f = 1.0 MHz
12
pF
COUT
Output capacitance
VOUT = 0 V, f = 1.0 MHz
8pF
相關(guān)PDF資料
PDF描述
EPF6024AQC208-2 LOADABLE PLD, PQFP208
EPF6024AQC208-3 LOADABLE PLD, PQFP208
EPF6024AQI208-3 LOADABLE PLD, PQFP208
EPF6024AQC240-1 LOADABLE PLD, PQFP240
EPF6024AQC240-2 LOADABLE PLD, PQFP240
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPF6024AQC208-1N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 196 LABs 171 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024AQC208-2 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 196 LABs 171 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024AQC208-2N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 196 LABs 171 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024AQC208-3 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 196 LABs 171 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6024AQC208-3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Flex 6000 196 LABs 171 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256