參數(shù)資料
型號: EPF6016AQC208-3
廠商: Altera
文件頁數(shù): 5/52頁
文件大小: 0K
描述: IC FLEX 6000 FPGA 16K 208-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 144
系列: FLEX 6000
LAB/CLB數(shù): 132
邏輯元件/單元數(shù): 1320
輸入/輸出數(shù): 171
門數(shù): 16000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
產(chǎn)品目錄頁面: 602 (CN2011-ZH PDF)
其它名稱: 544-1273
Altera Corporation
13
FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 6. Cascade Chain Operation
LE Operating Modes
The FLEX 6000 LE can operate in one of the following three modes:
Normal mode
Arithmetic mode
Counter mode
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. LAB-wide signals
provide clock, asynchronous clear, synchronous clear, and synchronous
load control for the register. The Altera software, in conjunction with
parameterized functions such as LPM and DesignWare functions,
automatically chooses the appropriate mode for common functions such
as counters, adders, and multipliers. If required, the designer can also
create special-purpose functions to use an LE operating mode for optimal
performance.
Figure 7 shows the LE operating modes.
d[3..0]
LE 2
LUT
d[7..4]
LE 3
LUT
LE
n + 1
LE
n + 1
LUT
d[3..0]
LUT
d[7..4]
LUT
LE 2
LE 3
AND Cascade Chain
OR Cascade Chain
d[(4
n-1)..4(n-1)]
d[(4
n-1)..4(n-1)]
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